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SDIO specification v2.0 - Support for low power state and 1-bit/4-bit mode switch

Other Parts Discussed in Thread: AM3352

I am supporting an integration with a WLAN chipset and the AM3352 processor.

The WLAN chipset requires that in case the host and the chipset are not communicating on the bus (low power state), both the chipset and the host are placed into a 1-bit SD mode before reaching the low power state.

I would like to confirm the MMC/SDIO controller is doing that step and does not stay in 4-bit mode before reaching the low power state. I would like to make sure the host controller does the transition between 4-bit to 1-bit mode (in case it was on 4-bit mode).