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Hi,
Please tell me about a calculation of the internal pull-down resistance.
A pull-down current value is listed in Table 5-17 Dual Voltage LVCMOS DC Electrical Characteristics of the data sheet of AM5728.
Is this numerical value a current of the totals to flow through in internal pull-down resistance and the ON resistance of internal ON/OFF?
In addition,please tell me the resistance value of the recommended external pull up and pull-down of I/O of AM5728.
Best Regards,
Shigehiro Tsuda
Internal pull-up/pull-down resistors are implemented with weak transistors. As the voltage present on the I/O pin varies the relative gate voltage to this weak transistor changes which will cause the effective pull-up/pull-down resistance to change. Therefore, internal resistors do not have a linear response like external resistors. The none-linearity along with process voltage and temperature variations require internal pull-up/pull-down resistors to be specified with a wide range of resistance or current sourcing/sinking.
The input current defined without a pull-up or pull-down turned on is for input leakage without any current from the internal pull resistors. The input current defined with a pull-up or pull-down turned on is a combination of leakage current and the current required to force the internal pull resistors to the opposite voltage rail. For example, if an internal pull-up is turned on the value shown represents the total current required to pull the input to VSS.
When deciding what value of external resistor to use you must consider the worst case combination of all internal leakage paths of all devices connected to a signal and make sure the external resistor is able to force these internal leakage paths to a potential greater than Vih min, or less than Vil. You must insure the input is not held at a mid-supply potential for long periods of time.
Regards,
Paul
I do not agree with this general comment. This may be a rule of thumb that works in many cases. However, the pull-up/pull-down resistor required for your specific system must be calculated based on combined worst case leakage of all devices connected to a signal if you want to be sure the resistor value is correct.
Once you understand the combined worst case leakage applied to a signal, you can calculate the resistance required to force the signal to a potential greater than Vih min, or less than Vil max.
Regards,
Paul