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AM335X reset scheme with TSP65217C for RTC timer functionality but no RTC-only mode:

Manoj Agarwal
Expert 1030 points

I am using RTC timer functionality but no RTC-only mode. Please check if attached reset scheme and pin connections  for EXT_WAKEUP, CAP_VDD_RTC, VDDS_RTC, RTC_KALDO_ENn are ok.

I am again writing my connection here for RTC timer functionality but no RTC-only mode:

PGOOD will be connected to PWRONRSTn

PGOOD will be connected to RTC_PWRONRSTn through open drain buffer with 1.8V pull up. As per AM335X checklist ,page no 6. We are also not using LDO1(TPS65217C) to connect it to VDDS_RTC.We are connecting VDDS_RTC to LDO3. Please confirm this connection as  your suggestion. RTC_PWRONRSTn is connected to LDO_GOOD.

PGOOD willbe connected to WARMRSTn through buffer or open drain buffer as per refrence schmetic of beagle bone considering the fact that there is a small chance that on power up the nRESETOUT signal on the processor may go high, causing the SYS_RESETn signal to go HI before it should. This change reinforces the reset with the PORZn reset signal.

  • 0
    TI__Guru**** 161600 points
    Hi Manoj,

    Sorry for the delayed response. I've contacted the hw team.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    TI__Genius 9655 points

    Here is the correct way to connect given your use condition:

    Also, please review the application note below:

    www.ti.com/.../slvu551i.pdf

  • 0 in reply to sivak
    TI__Genius 9655 points

    The picture did not make it earlier. Trying again.

  • 0 in reply to sivak
    Expert 1030 points

    Hi Sivak,

    I am again writing my connection here for RTC timer functionality but no RTC-only mode:

    PGOOD will be connected to PWRONRSTn

    PGOOD will be connected to RTC_PWRONRSTn through open drain buffer with 1.8V pull up. As per AM335X checklist ,page no 6. We are also not using LDO1(TPS65217C) to connect it to VDDS_RTC.We are connecting VDDS_RTC to LDO3. Please confirm this connection as  your suggestion. RTC_PWRONRSTn is connected to LDO_GOOD.

    PGOOD willbe connected to WARMRSTn through buffer or open drain buffer as per refrence schmetic of beagle bone considering the fact that there is a small chance that on power up the nRESETOUT signal on the processor may go high, causing the SYS_RESETn signal to go HI before it should. This change reinforces the reset with the PORZn reset signal.