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HYPERLINK support for 66AK2H14

vidya krishnamoorthy
Expert 2865 points
Other Parts Discussed in Thread: 66AK2H14

Hi,


We have designed a board with 66AK2H14  and TMSC6678 processor .And  want to test Hyperlink functionality between 66AK2H14  and TMSC6678 processor.

We have already posted the query on this some months ago and link for your reference,

We want to know whether hyperlink functionality is possible between Keystone II and Keystone I family.

Please confirm,

  • 0
    TI__Guru** 116100 points

    We will look into it.

    Also please try the same with latest processor SDK package.

    C6678 Hyperlink example:

    C:\ti\pdk_c667x_2_0_2\packages\MyExampleProjects\hyplnk_evmc6678_C66BiosExampleProject

    K2HK Hyperlink example:

    C:\ti\pdk_k2hk_4_0_2\packages\MyExampleProjects\hyplnk_K2HC66BiosExampleProject

  • 0
    TI__Guru**** 161600 points
    Hi Vidya,

    As I see from the documents, both Keystone I & Keystone II devices use the same version of hyperlink (they share the same user guide):
    www.ti.com/.../sprugw8c.pdf

    So, my understanding is that there shouldn't be a problem to use hyperlink for communication between KS1 & KS2 devices.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    Expert 2865 points
    Hi,

    Thanks for your input,

    Can you share any test code to test the communication between the KS1 and KS2 to confirm.
  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points

    You have to comment out the below #define in hyperlink configuration files (hyplnkLLDCfg.h) of both K2HK and C667x.
    It would do both TX and RX transactions (External loopback) between KS2 and KS1 board.

    #define hyplnk_EXAMPLE_LOOPBACK

    C:\ti\pdk_k2hk_4_0_2\packages\ti\drv\hyplnk\example\common\hyplnkLLDCfg.h
    C:\ti\pdk_c667x_2_0_2\packages\ti\drv\hyplnk\example\common\hyplnkLLDCfg.h

  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points
    Hi Titus,

    We have done this , that why we were able to transfer from c6678 to K2HK.But not from K2HK to c6678.
  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    Thanks.
    Have you tried the same with K2HK to K2HK ?
    Have you tried to use the latest processor SDK ?
    I just compared the code, everything is same, so please try to use the latest hyperlink example from PSDK .
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    We have one 66Ak2hk14 and 3 TMSC6678 in our board.

    So i tested with K2HK and c6678 only.

    I am using pdk_keystone2_3_00_03_15 and mcsdk_bios_3_00_03_15 for K2HK.

    And pdk_C6678_1_1_2_6 mcsdk_bios_3_00_03_15 for TMSC6678.

    Do these package have any difference with the latest one ?

  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    Will ask experts to support further.
    Thanks for your patience.
  • 0 in reply to Titusrathinaraj Stalin
    TI__Guru* 95265 points

    There is no issue for Hyperlink between KS II and KS I devices. We have customer with such product. Please describe how the 1 KS II and 3 C6678 connected for Hyperlink?

    What is the reference clock of 66ak2h14 and C6678? Please try to run 6.25 Gb or 3.125Gb rate first before trying 10Gb. The mapping is both way and read/write also worked both way. Can we debug the connection between KS2 port 0 and KS1?

    Regards, Eric

  • 0 in reply to lding
    Expert 2865 points

    Hi,

    Thanks for your reply,

    We are using reference clock of 156.25Mhz and trying at 6.25Gb. 

    Loop back within KS1 and KS2 worked fine.But external loop back from KS1 to KS2  fails. Attached the log.

    As i mentioned earlier, I am using CCS-5.5 for compiling pdk_keystone2_3_00_03_15 (K2HK) package and using CCS-5.3 for compiling (CC678) pdk_C6678_1_1_2_6.

    Also attached our hyperlink connection between the KS1(dsp1) and KS2(dsp2) .

    Fullscreen hyperlinlk.txt Download 
    [C66xx_0] Version #: 0x02000009; string HYPLNK LLD Revision: 02.00.00.09:Nov 24 2013:17:32:20
About to do system setup (PLL, PSC, and DDR)
Power domain is already enabled.  You probably re-ran without device reset (which is OK)
Constructed SERDES configs: PLL=0x00000250; RX=0x0046c485; TX=0x000cc305
system setup worked
About to set up HyperLink Peripheral
============================Hyperlink Testing Port 0 
========================================== begin registers before initialization ===========
Revision register contents:
  Raw    = 0x4e902101
Status register contents:
  Raw        = 0x00003004
Link status register contents:
  Raw       = 0x00000000
Control register contents:
  Raw             = 0x00000000
Control register contents:
  Raw        = 0x00000000
============== end registers before initialization ===========
Waiting for other side to come up (       0)
[C66xx_0] Waiting for other side to come up (       1)



[C66xx_8] Version #: 0x01000105; string HYPLNK LLD Revision: 01.00.01.05:Nov 19 2012:16:04:15
About to do system setup (PLL, PSC, and DDR)
Constructed SERDES configs: PLL=0x00000250; RX=0x0046c485; TX=0x000a0305
system setup worked
About to set up HyperLink Peripheral
============== begin registers after initialization ===========
Status register contents:
  Raw        = 0x04400005
Link status register contents:
  Raw       = 0xccf00cff
Control register contents:
  Raw             = 0x00006200
============== end registers after initialization ===========
Waiting 5 seconds to check link stability
Precursors 0 
Postcursors: 19 
Link seems stable
About to try to read remote registers

    C15023-D.pdf

  • 0 in reply to vidya krishnamoorthy
    TI__Guru* 95265 points

    The typical working case Hyperlink register dumps likes below:
    21400000: 4e902101 00006000 04400005 80000000    .!.N.`....@.....
    21400010: 00000000 00000000 00000000 00000c0a    ................
    21400020: 00000000 00000000 00000000 00000000    ................
    21400030: 00000000 00000000 00000000 00000000    ................
    21400040: 0002b981 07070004 04000400 00000000    ................
    21400050: 00000000 00000000 fdf0bdf0 00200320    ............ . .
    21400060: 00000000 00000000 00000000 00000000    ................
    21400070: ffff0000 00000000 00000000 00000000

    In your log:
    [C66xx_0] Version #: 0x02000009; string HYPLNK LLD Revision: 02.00.00.09:Nov 24 2013:17:32:20
    About to do system setup (PLL, PSC, and DDR)
    Power domain is already enabled.  You probably re-ran without device reset (which is OK)
    Constructed SERDES configs: PLL=0x00000250; RX=0x0046c485; TX=0x000cc305
    system setup worked
    About to set up HyperLink Peripheral
    ============================Hyperlink Testing Port 0
    ========================================== begin registers before initialization ===========
    Revision register contents:
      Raw    = 0x4e902101
    Status register contents:
      Raw        = 0x00003004
    Link status register contents:
      Raw       = 0x00000000
    Control register contents:
      Raw             = 0x00000000
    Control register contents:
      Raw        = 0x00000000
    ============== end registers before initialization ===========
    Waiting for other side to come up (       0)
    [C66xx_0] Waiting for other side to come up (       1)

    There is no link from K2H to C6678 at all. ""HYPLNK LLD Revision: 02.00.00.09:Nov 24 2013:17:32:20: is very old, please use latest one from Processor SDK 3.0 release.

    [C66xx_8] Version #: 0x01000105; string HYPLNK LLD Revision: 01.00.01.05:Nov 19 2012:16:04:15
    About to do system setup (PLL, PSC, and DDR)
    Constructed SERDES configs: PLL=0x00000250; RX=0x0046c485; TX=0x000a0305
    system setup worked
    About to set up HyperLink Peripheral
    ============== begin registers after initialization ===========
    Status register contents:
      Raw        = 0x04400005
    Link status register contents:
      Raw       = 0xccf00cff
    Control register contents:
      Raw             = 0x00006200
    ============== end registers after initialization ===========
    Waiting 5 seconds to check link stability
    Precursors 0
    Postcursors: 19
    Link seems stable
    About to try to read remote registers

    C6678 side, the intialization seems correct, but as K2H side problem, the link is not coming up. I am surprised how you can do one direction transfer?

    As you have four SOC on the board, can you explain K2H port 0 is connected to ? K2H port 1 is connected to ? From diagram, it looks that only K2H PORT 0 connected to C6678 via Hyperlink?

    Regards, Eric

  • 0 in reply to lding
    Expert 2865 points

    Hi ,

    Do you want me to change the pdk and mcsdk package to latest revision ?

    Can you please tell what is the difference in SDK Rev 2 and Rev 3 because we have developed some of our application projects in rev2  sdk.

    Also please give me the link to download the latest sdk .

  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    Titus,

    I have downloaded the ti-processor-sdk-rtos-k2hk-evm-03.00.00.04-Windows-x86-Install.exe and installed pdk_k2hk_4_0_2 .

    The software manifest of this sdk doesnt specify mcsdk package. 

    Can i use the mcsdk_linux_3_00_03_15 which was installed earlier ?

    Also please ensure the pdk package 4.0.2 is the latest one to test hyperlink functionality.

  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points
    I could not find hyperlink example projects in latest pdk_4_0_2.
  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    Yes, you won't find any information in MCSDK, as this is not MCSDK release but processor SDK.
    Please refer to the following TI wiki pages.
    processors.wiki.ti.com/.../MCSDK_to_Processor_SDK_Migration
    processors.wiki.ti.com/.../Processor_SDK_Linux_Migration_Guide
    processors.wiki.ti.com/.../Processor_SDK_RTOS_Migration_Guide


    Here its Hyperlink example:
    C:\ti\pdk_k2hk_4_0_2\packages\MyExampleProjects\hyplnk_K2HC66BiosExampleProject

    You need to create examples yourself by running "pdkProjectCreate.bat"
    C:\ti\pdk_k2hk_4_0_2\packages\pdkProjectCreate.bat

    Ex:
    C:\ti\pdk_k2hk_4_0_2\packages\pdkProjectCreate.bat K2H all little all arm
    C:\ti\pdk_k2hk_4_0_2\packages\pdkProjectCreate.bat K2H all little all dsp

    Refer to this wiki page.
    processors.wiki.ti.com/.../Processor_SDK_-_Create_PDK_projects
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    Titus,

    I have already installed 5.3 ccs in C:\ directory and using ARM K2H ccs 5.5 in H"\ .

    I have installed the folders in H: directory.

    Your pdkProjectCreate.bat default takes C:/ directory.

    I edited the pdkProjectCreate.bat to takes the folders from H:/ directory but C6X_GEN_INSTALL_PATH takes c:\windows\system32 path . Please guide how to change this and execute.

  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    Getting error when i do pdksetupenv.bat 

    H:\ARM-ccs\pdk_k2hk_4_0_2\packages>pdksetupenv.bat "H:\ARM-ccs\pdk_k2hk_4_0_2\packages"
\PC was unexpected at this time.
H:\ARM-ccs\pdk_k2hk_4_0_2\packages>

  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    Hi Titus,

    Any inputs on this.

  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    Can you hard code the PDK_INSTALL_PATH inside the "pdksetupenv.bat" script ?
    set PDK_INSTALL_PATH=H:\ARM-ccs\pdk_k2hk_4_0_2\packages

    Also please go ahead and run the psdkcreate script to generate examples.

    After installation of processor SDK, you should open the CCS and update all the SWs installed newly to create the projects successfully.

    PS: You should use CCSv6 to work with latest processor SDK examples.
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    I could not see any example projects after running command "psdkcreate script"

    Attached the log,

    Fullscreen pdk-log.txt Download 
    H:\ARM-ccs\pdk_k2hk_4_0_2\packages>pdkProjectCreate.bat
=========================================================================
Configuration:
   SOC             :   AM335x
   BOARD           :   all
   ENDIAN          :   little
   MODULE          :   all
   PROCESSOR       :   arm
   PDK_SHORT_NAME  :   H:\ARM-ccs\PDK_K2~1\packages\
=========================================================================
Checking Configuration...
Complete
=========================================================================
   PDK_PARTNO         : AM335
   PDK_ECLIPSE_ID     : com.ti.pdk.am335x
   RTSC_PLATFORM_NAME : ti.platforms.evmAM3359
   RTSC_TARGET        : gnu.targets.arm.A8F
   CCS_DEVICE         : "Cortex A.AM3359.ICE_AM3359"
*****************************************************************************
Detecting all projects in PDK and importing them in the workspace H:\ARM-ccs\PDK_K2~1\packages\\MyExampleProjects
Detected Test Project: GPIO_LedBlink_bbbAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: GPIO_LedBlink_icev2AM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: GPIO_LedBlink_skAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: GPIO_LedBlink_bbbAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: GPIO_LedBlink_icev2AM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: GPIO_LedBlink_skAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: I2C_Example_bbbAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: I2C_Example_evmAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: I2C_Example_icev2AM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: I2C_Example_skAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: I2C_Test_bbbAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: I2C_Test_evmAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: I2C_Test_icev2AM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: I2C_Test_skAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: MCSPI_BasicExample_icev2AM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: MCSPI_SlaveMode_MasterExample_bbbAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: MCSPI_SlaveMode_MasterExample_icev2AM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: MCSPI_SlaveMode_SlaveExample_bbbAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: MCSPI_SlaveMode_SlaveExample_icev2AM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: MCSPI_BasicExample_icev2AM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: MCSPI_SerialFlash_Dma_evmAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: UART_BasicExample_bbbAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: UART_BasicExample_evmAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: UART_BasicExample_icev2AM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: UART_BasicExample_skAM335x_armExampleProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: UART_BasicExample_bbbAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: UART_BasicExample_Dma_evmAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: UART_BasicExample_evmAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: UART_BasicExample_icev2AM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: UART_BasicExample_skAM335x_armTestProject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: NIMU_BasicExample_bbbAM335x_armExampleproject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: NIMU_BasicExample_evmAM335x_armExampleproject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: NIMU_BasicExample_icev2AM335x_armExampleproject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: NIMU_BasicExample_skAM335x_armExampleproject
The system cannot find the path specified.
Copying macro.ini
The system cannot find the path specified.
        0 file(s) copied.
No projects detected
Project generation complete
*****************************************************************************
H:\ARM-ccs\pdk_k2hk_4_0_2\packages>

  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    As I told you earlier, you should mention the platform name "K2H".
    e2e.ti.com/.../1968790

    Ex:
    C:\ti\pdk_k2hk_4_0_2\packages\pdkProjectCreate.bat K2H all little all arm
    C:\ti\pdk_k2hk_4_0_2\packages\pdkProjectCreate.bat K2H all little all dsp

    For hyperlink:
    C:\ti\pdk_k2hk_4_0_2\packages\pdkProjectCreate.bat K2H all little hyplnk dsp
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points
    I have given the same command as you said and it dint work.

    You can see my log attached in my previous post.
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points
    Titus,

    Is there any dependency for CCSV 6 to installed.

    I am using CCSV.5.5 to build projects and the same is installed in h:\arm_ccs path.

    But in pdkProjectCreate.bat , it is mentioned CCS_INSTALL_PATH as "C:\ti\ccsv6"

    Do this create any issue in installing the projects ?

    Please let me know,
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    Hi Titus,

    I am able to get the example projects folder after installing CCS V 6.

    Now I want to run hyperlink projects on dsp core 0 of 66AK2HK.

    Please tell me which  command (pdkProjectCreate.bat K2H all little all arm or pdkProjectCreate.bat K2H all little all dsp )do i need to use to get projects to run on dsp core of 66AK2HK.

    Please clarify.

  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    Use the following location to import the Hyperlink project into CCS and do rebuild.
    C:\ti\pdk_k2hk_4_0_2\packages\MyExampleProjects\hyplnk_K2HC66BiosExampleProject
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    I gave command "pdkProjectCreate.bat K2H all little all arm" which installed example projects in the path specified.

    Can I use these projects to  run on DSP core of 66AK2HK  ?

  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    Titus,

    I could not find this project in the path.

    When i give command "pdkProjectCreate.bat C6678 all little all dsp D:\ti\pdk_k2hk_4_0_2\packages", it gives error message !ERROR: Unknown product-type ID 'com.ti.pdk.c667x'!

    Attached log,

    Please guide on this to solve it.

     

  • 0 in reply to vidya krishnamoorthy
    Expert 2865 points

    Attached log,

    Fullscreen dsp-log.txt Download 
    D:\ti\pdk_k2hk_4_0_2\packages>pdkProjectCreate.bat C6678 all little all dsp D:\ti\pdk_k2hk_4_0_2\packages
=========================================================================
Configuration:
   SOC             :   C6678
   BOARD           :   all
   ENDIAN          :   little
   MODULE          :   all
   PROCESSOR       :   dsp
   PDK_SHORT_NAME  :   D:\ti\pdk_k2hk_4_0_2\packages
=========================================================================
Checking Configuration...
Complete
=========================================================================
   PDK_PARTNO         : C6678L
   PDK_ECLIPSE_ID     : com.ti.pdk.c667x
   RTSC_PLATFORM_NAME : ti.platforms.evm6678
   RTSC_TARGET        : ti.targets.elf.C66
   CCS_DEVICE         : "com.ti.ccstudio.deviceModel.C6000.GenericC64xPlusDevice
"
*****************************************************************************
Detecting all projects in PDK and importing them in the workspace D:\ti\pdk_k2hk
_4_0_2\packages\MyExampleProjects
Detected Test Project: cppi_evmc6678_c66BiosExampleProject

--------------------------------------------------------------------------------

Creating project 'cppi_evmc6678_c66BiosExampleProject'...

    NOTE: Compiler version '8.1.0' is not currently installed! - defaulting to '
8.1.1'.
  !ERROR: Unknown product-type ID 'com.ti.pdk.c667x'!
    NOTE: Refer to the following list of available product-type IDs (the display
-names in square brackets are for reference only):

        com.ti.ctoolslib [CTools Library]
        ti.mas.dsplib.c66x [DSPLIB C66x]
        com.ti.sdo.edma3 [EDMA3 Low Level Driver]
        com.ti.rtsc.FrameworkComponents [Framework Components]
        ti.imglib.c66x [IMGLIB C66x]
        com.ti.rtsc.IPC [IPC]
        ti.mathlib.c66x [MATHLIB C66x]
        com.ti.rtsc.NDK [NDK]
        com.ti.rtsc.openmp [OpenMP Runtime 2.x library]
        com.ti.rtsc.SYSBIOS [SYS/BIOS]
        com.ti.uia [System Analyzer (UIA Target)]
        com.ti.rtsc.XDAIS [XDAIS]
        com.ti.pdk.k2hk [k2hk PDK]

Copying macros.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: cppi_evmc6678_C66BiosTestProject

--------------------------------------------------------------------------------

Creating project 'cppi_evmc6678_C66BiosTestProject'...

    NOTE: Compiler version '8.1.0' is not currently installed! - defaulting to '
8.1.1'.
  !ERROR: Unknown product-type ID 'com.ti.pdk.c667x'!
    NOTE: Refer to the following list of available product-type IDs (the display
-names in square brackets are for reference only):

        com.ti.ctoolslib [CTools Library]
        ti.mas.dsplib.c66x [DSPLIB C66x]
        com.ti.sdo.edma3 [EDMA3 Low Level Driver]
        com.ti.rtsc.FrameworkComponents [Framework Components]
        ti.imglib.c66x [IMGLIB C66x]
        com.ti.rtsc.IPC [IPC]
        ti.mathlib.c66x [MATHLIB C66x]
        com.ti.rtsc.NDK [NDK]
        com.ti.rtsc.openmp [OpenMP Runtime 2.x library]
        com.ti.rtsc.SYSBIOS [SYS/BIOS]
        com.ti.uia [System Analyzer (UIA Target)]
        com.ti.rtsc.XDAIS [XDAIS]
        com.ti.pdk.k2hk [k2hk PDK]

Copying macros.ini
The system cannot find the path specified.
        0 file(s) copied.
Detected Test Project: GPIO_LedBlink_C6678_EVM_c66xExampleProject
^CCopying macros.ini
        0 file(s) copied.

  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points
    Titus,

    Any input on this ?
  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    To address this problem, you should open the CCSv6 and update all the newly SWs installed (processor SDK, EDMA3, IPC etc.,)
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    I have done that already but still error is same.

    Error says it could not find or match the product type "Error is unknown product-type ID 'com.ti.pdk.c667x'!

    Is the same script working at your end ?

  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    You installed the K2H package and trying to create examples for C6678.
    D:\ti\pdk_k2hk_4_0_2\packages>pdkProjectCreate.bat C6678 all little all dsp D:\ti\pdk_k2hk_4_0_2\packages

    You have to do like this for K2H examples.
    D:\ti\pdk_k2hk_4_0_2\packages>pdkProjectCreate.bat K2H all little all dsp D:\ti\pdk_k2hk_4_0_2\packages

    For C6678, you should download & install and do the same.
    D:\ti\pdk_c667x_2_0_2\packages>pdkProjectCreate.bat C6678 all little all dsp D:\ti\pdk_c667x_2_0_2\packages
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points


    Please tell me the exact steps to do to test the hyperlink functionality in 66AK2HK.

    I installed the sdk as you said and it has only K2H pdk in it.

    Is it necessary to install pdk_c667x_2_0_2 in order to test the hyperlink functionallity ?

    From which sdk i can download this PDK package ?

    In our chat , you referred the hyperlink project in C:\ti\pdk_k2hk_4_0_2\packages\MyExampleProjects\hyplnk_K2HC66BiosExampleProject path.Which use pdk_k2hk_4_0_2 package.

    Please clarify,

  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    As per your requirement, you need to test the hyperlink between C6678 and K2H right ? so you need to download the processor SDK package for C6678 and create the examples too.

    I hope you have referred my post already!
    e2e.ti.com/.../1968707

    Able to create Hyperlink example for K2H now by running the below command ?
    D:\ti\pdk_k2hk_4_0_2\packages>pdkProjectCreate.bat K2H all little all dsp D:\ti\pdk_k2hk_4_0_2\packages

    Can you see the below location with *.ccsproject file in below location?
    C:\ti\pdk_k2hk_4_0_2\packages\MyExampleProjects\hyplnk_K2HC66BiosExampleProject

    Use this location to import the processor SDK's hyperlink project into CCS and do rebuild it.
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points
    Thanks Titus.

    I am able to get the project in the specified path after giving the command as you said.

    I have pdk package ( pdk_C6678_1_1_2_6) for C6678 which i am using for testing hyperlink earlier.

    In response to the hyperlink query , lding suggested to replace only the K2HK since its old and he dint specify to change the c6678 PDK.

    Do i still need to download the C6678 pdk. If so , then i have to undergo to many changes in my Application.

    Please suggest
  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    Hi Vidya,

    In response to the hyperlink query , lding suggested to replace only the K2HK since its old and he dint specify to change the c6678 PDK.

    Okay then you no need to use the C6678 processor SDK package.
    Try to test with PSDK K2H and MCSDK C6678 hyperlink HW loopback example.

    But its recommended to use the latest processor SDK package.

    Do i still need to download the C6678 pdk. If so , then i have to undergo to many changes in my Application.

    I hope that its not so tough to update your custom changes in the PSDK C6678 hyperlink example if you thorough with your changes, file name and location :-)

    Please let me or Eric know if you face the same issue with latest processor SDK hyperlink example.
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points

    Hi Titus,

    I checked the hyperlink functionality with latest sdk package between K2HK port 0 and C6678 port 0 for 3.125 serial rate.

    It looks K2HK getting failed during transfer and C6678 is getting passed during block transfer at 3.125. 

    At 6.25,both K2HK and c6678 hangs.

    I have attached complete log,

    Please suggest ,

    Fullscreen Hyperlink-log.txt Download 
    [C66xx_0] Version #: 0x02010006; string HYPLNK LLD Revision: 02.01.00.06:Jul  9 2016:02:48:44
About to do system setup (PLL, PSC, and DDR)
Power domain is already enabled.  You probably re-ran without device reset (which is OK)
Constructed SERDES configs: PLL=0x00000250; RX=0x0046c495; TX=0x000ccf95
system setup worked
About to set up HyperLink Peripheral
============================Hyperlink Testing Port 0 
========================================== begin registers before initialization ===========
Revision register contents:
  Raw    = 0x4e902101
Status register contents:
  Raw        = 0x00003004
Link status register contents:
  Raw       = 0x00000000
Control register contents:
  Raw             = 0x00000000
Control register contents:
  Raw        = 0x00000000
============== end registers before initialization ===========
Hyperlink Serdes Common Init Complete
[C66xx_8] Version #: 0x01000105; string HYPLNK LLD Revision: 01.00.01.05:Nov 19 2012:16:04:15
About to do system setup (PLL, PSC, and DDR)
Constructed SERDES configs: PLL=0x00000250; RX=0x0046c495; TX=0x000ccf95
system setup worked
About to set up HyperLink Peripheral
[C66xx_0] Hyperlink Serdes Lane 0 Init Complete
Hyperlink Serdes Lane 1 Init Complete
Hyperlink Serdes Lane 2 Init Complete
Hyperlink Serdes Lane 3 Init Complete
============== begin registers after initialization ===========
Status register contents:
  Raw        = 0x04402005
Link status register contents:
  Raw       = 0xfdf0bdf0
Control register contents:
  Raw             = 0x00006204
============== end registers after initialization ===========
Waiting 5 seconds to check link stability
[C66xx_8] Peripheral setup worked


 $$$$$Address map local = 80000000, remote = 40000000


 HyperLink Exit DSP2 

About to read/write once
hyplnkExampleCPUBlockXfer passed: 0
Single write test passed   dataBuffer  80000000  bufferThroughHypLnk 40000000   
About to pass 256 tokens; iteration = 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
[C66xx_0] Analyzing the connection for each lane
Precursors 1 
Postcursors: 19 
Link seems stable
About to try to read remote registers
============== begin REMOTE registers after initialization ===========
Status register contents:
  Raw        = 0x0440000b
Link status register contents:
  Raw       = 0xfdf0bdf0
Control register contents:
  Raw             = 0x00006200
============== end REMOTE registers after initialization ===========
Peripheral setup worked
About to read/write once
[C66xx_8] hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
[C66xx_0] fail 0 0
[C66xx_8] hyplnkExampleCPUBlockXfer passed: 0
[C66xx_0] hyplnkExampleCPUTokenExchange failed: 1
[C66xx_8] hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
[C66xx_0] fail 0 0
hyplnkExampleDMATokenExchange failed: 1
hyplnkExampleCPUBlockXfer failed: 3265
[C66xx_8] hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
=== this is not an optimized example start_time === 5511854051 stop_time === 68127186211
Link Speed is 4 * 3.125 Gbps
Passed 256 tokens round trip (read+write through hyplnk) in 62615 Mcycles
Approximately 244591141 cycles per round-trip
=== this is not an optimized example ===
Checking statistics
About to pass 256 tokens; iteration = 1
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
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hyplnkExampleCPUBlockXfer passed: 0
hyplnkExampleCPUBlockXfer passed: 0
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  • 0 in reply to Titusrathinaraj Stalin
    Expert 2865 points
    Hi Titus & Eric,

    Any suggestions on the hyperlink issue.

    We have to clear our pcb design and its long pending.
  • 0 in reply to vidya krishnamoorthy
    TI__Guru** 116100 points
    I requested Eric to support for this issue.
    Thanks for your patience.
  • 0 in reply to vidya krishnamoorthy
    TI__Guru* 95265 points

    vidya,

    The Hyperlink driver is in maintainence and different releases should all work for this basic setup and data exchange.

    I tested Hyperlink connection between TI 6678EVM and K2H EVM (port 0), in 4 lanes @6.25Gb/s. The reference clock to EVM are both 312.5MHz. The K2H side SW is pdk_k2hk_4_0_0, C6678 side is pdk_C6678_1_1_2_6. I attached the binary for you reference. If you have TI EVM, you can run and verify. If your customized board using 312.5MHz reference clock, you can also run and verify.

    The output from K2H side:

    [C66xx_0] Version #: 0x02010005; string HYPLNK LLD Revision: 02.01.00.05:Jan  7 2016:18:54:01

    About to do system setup (PLL, PSC, and DDR)

    Power domain is already enabled.  You probably re-ran without device reset (which is OK)

    Constructed SERDES configs: PLL=0x00000228; RX=0x0046c485; TX=0x000cc305

    system setup worked

    About to set up HyperLink Peripheral

    ============================Hyperlink Testing Port 0

    ========================================== begin registers before initialization ===========

    Revision register contents:

     Raw    = 0x4e902101

    Status register contents:

     Raw        = 0x00003004

    Link status register contents:

     Raw       = 0x00000000

    Control register contents:

     Raw             = 0x00000000

    Control register contents:

     Raw        = 0x00000000

    ============== end registers before initialization ===========

    Hyperlink Serdes Common Init Complete

    Hyperlink Serdes Lane 0 Init Complete

    Hyperlink Serdes Lane 1 Init Complete

    Hyperlink Serdes Lane 2 Init Complete

    Hyperlink Serdes Lane 3 Init Complete

    ============== begin registers after initialization ===========

    Status register contents:

     Raw        = 0x04402005

    Link status register contents:

     Raw       = 0xfdf0bdf0

    Control register contents:

     Raw             = 0x00006204

    ============== end registers after initialization ===========

    Waiting 5 seconds to check link stability

    Precursors 0

    Postcursors: 19

    Link seems stable

    About to try to read remote registers

    ============== begin REMOTE registers after initialization ===========

    Status register contents:

     Raw        = 0x0440000b

    Link status register contents:

     Raw       = 0xfdf0bdf0

    Control register contents:

     Raw             = 0x00006200

    ============== end REMOTE registers after initialization ===========

    Peripheral setup worked

    About to read/write once

    output from C6678 SIDE:

    [C66xx_0] Version #: 0x01000105; string HYPLNK LLD Revision: 01.00.01.05:Nov 19 2012:16:04:15

    About to do system setup (PLL, PSC, and DDR)

    Constructed SERDES configs: PLL=0x00000228; RX=0x0046c485; TX=0x000cc305

    system setup worked

    About to set up HyperLink Peripheral

    ============== begin registers before initialization ===========

    Revision register contents:

    Raw = 0x4e901900

    Status register contents:

    Raw = 0x00002004

    Link status register contents:

    Raw = 0x00000000

    Control register contents:

    Raw = 0x00000001

    Control register contents:

    Raw = 0x00000000

    ============== end registers before initialization ===========

    SERDES_STS (32 bits) contents: 0x0c080001; lock = 1

    ============== begin registers after initialization ===========

    Status register contents:

    Raw = 0x04400005

    Link status register contents:

    Raw = 0xccf00cff  =====> You may not rely on this, at the time of print this register, this may not the right content.

    Control register contents:

    Raw = 0x00006200

    ============== end registers after initialization ===========

    Waiting 5 seconds to check link stability

    You need to dump register from 0x2140_0000 to 0x2140_007c to make sure offset 0x4 and offset 0x58 looks right. Offset 0x4: no reset, no loopback, no serial stop, offset 0x58 = 0xfdf0bdf0. You can also look at http://www.ti.com/lit/an/sprac37/sprac37.pdf section 4.4 for more tips.

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/hyplnk_5F00_exampleProject.out

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/hyplnk_5F00_K2HC66BiosExampleProject.out

    Regards, Eric

  • 0 in reply to lding
    TI__Guru* 95265 points

    I also attached a working case register dump for you reference:

    0x2140_0000 to 0x2140_007c is C6678 side

    0x2140_0080 to 0x2140_00FC is K2H side mapped into C6678 side, equavalent to itself's 0x2140_0000 to 0x2140_007C

    Regards, Eric

  • 0 in reply to lding
    Expert 2865 points

    Hi Eric,

    We tested our board with your hyperlink image and its looks working. 

    What is the difference in K2HK pdk package. I am using the latest K2HKPDK - 4.0.2 and yours is 4.0.0. 

    Can you please share the hyperlink project files of respective images so we can import the project and check if  PDK is not an issue.

  • 0 in reply to lding
    Expert 2865 points
    Hi Eric,

    Any inputs ??

    Can you send us the source files of your both images.
  • 0 in reply to lding
    Expert 2865 points

    Hi Eric,

    Thanks for sharing the source. 

    The source is working for 6.25Gbps. We modified for 10Gbps but its not working.

    We added below lines in hyplnkLLDIFace.c

    #elif defined hyplnk_EXAMPLE_SERRATE_10p000 
linkRate = CSL_SERDES_LINK_RATE_10G;
lane_rate = CSL_SERDES_LANE_HALF_RATE;

    We changed the lane rate to Full and Half but still it dint work.

    Please guide us on this as we need to prove the pcb working at 10G  rate , 

    Attached log,

    Fullscreen Hyperlink-log1.txt Download 
    /*******[C66xx_0] K2HK log********/
[C66xx_0] Version #: 0x02010005; string HYPLNK LLD Revision: 02.01.00.05:Jan  7 2016:18:54:01
About to do system setup (PLL, PSC, and DDR)
Power domain is already enabled.  You probably re-ran without device reset (which is OK)
Constructed SERDES configs: PLL=0x00000040; RX=0x0046c485; TX=0x000d0c05
system setup worked
About to set up HyperLink Peripheral
============================Hyperlink Testing Port 0 
========================================== begin registers before initialization ===========
Revision register contents:
  Raw    = 0x4e902101
Status register contents:
  Raw        = 0x00003004
Link status register contents:
  Raw       = 0x00000000
Control register contents:
  Raw             = 0x00000000
Control register contents:
  Raw        = 0x00000000
============== end registers before initialization ===========
Hyperlink Serdes Common Init Complete



/******[C66xx_8] C6678 LOG********/
[C66xx_8] Version #: 0x01000105; string HYPLNK LLD Revision: 01.00.01.05:Nov 19 2012:16:04:15
About to do system setup (PLL, PSC, and DDR)
Power domain is already enabled.  You probably re-ran without device reset (which is OK)
Constructed SERDES configs: PLL=0x00000040; RX=0x0046c485; TX=0x000d0c05
system setup worked
About to set up HyperLink Peripheral
============== begin registers before initialization ===========
Revision register contents:
  Raw    = 0x4e901900
Status register contents:
  Raw        = 0x00002004
Link status register contents:
  Raw       = 0x00000000
Control register contents:
  Raw             = 0x00000001
Control register contents:
  Raw        = 0x00000000
============== end registers before initialization ===========
SERDES_STS (32 bits) contents: 0x00000001; lock = 1
============== begin registers after initialization ===========
Status register contents:
  Raw        = 0x04400005
Link status register contents:
  Raw       = 0xccf00cf0
Control register contents:
  Raw             = 0x00006200
============== end registers after initialization ===========
Waiting 5 seconds to check link stability



[C66xx_0] Hyperlink Serdes Lane 0 Init Complete
Hyperlink Serdes Lane 1 Init Complete
Hyperlink Serdes Lane 2 Init Complete
Fatal error detected
Local fatal isr status.lError = 1
Local fatal isr ECCErrors.dblErrDet = 1

[C66xx_8] Fatal error detected
Local fatal isr status.rError = 1

  • 0 in reply to vidya krishnamoorthy
    TI__Guru* 95265 points

    Vidya,

    For K2H side, if you want to use 10G, lane_rate = CSL_SERDES_LANE_FULL_RATE;

    For the 10G Hyperlink, from HW side, you need careful PCB design. From SW side, you need Serdes level tuning to find the best transmit and receive side parameter, otherwise the bit error rate maybe too high and the link breaks at the intialization or run time (like you saw lerror and rerror in your log). The SW tuning is quite complicated and the package is not available in our Processor SDK, between K2H and C6678. You may look at pdk_k2hk_4_0_x\packages\ti\diag\serdes_diag for some idea when tuning between K2H and K2H. The tuning is very time consuming and may take weeks to finish.

    So far I am not aware of any production system running Hyperlink beyween K2H and C6678 at 10Gb/s, but we do have such product running @6.25Gb/s from customer.

    For your existing system, you can look at Hyperlink register offset 0x4C ECC error counter to judge your link quality or PCB design, it is expected to be zero or no increment over long time stress test.

    Regards, Eric 

  • 0 in reply to lding
    Expert 2865 points

    Hi Eric,

    Thanks for your reply,

    We have tried the hyperlink at half and full lane rate with your software. But still it shows same error.

    Hyperlink at 10G between other C6678  dsp's is working fine but hangs after some 35 to 40 iterations.

    We also suspect in PCB , because the PCB material which we are using is not an high speed material. Will this be the reason for failing communication between the K2HK and c6678 processor ?

    Can you please let tell me know when your SDK release with 10G support in Hyperlink will be ready.Because our customer use 10G hyperlink and we have to confirm the same between K2HK and c6678.

  • 0 in reply to vidya krishnamoorthy
    TI__Guru* 95265 points
    The SDK release supports 10G Hyperlink already by configuring the 10G with full rate, using the DEFAULT configuration.

    To make it working or stable, the bit error rate needs to be plotted by using all the possible Tx, Rx parameter combinations, then to determine if we have a stable region and if the HW needs any improvement. Such software is already provided between Keystone II and Keystone II device, as I mentioned in earlier post. For between Keystone II and Keystone I device, unfortunatedly we don't have such software release plan.

    Regards, Eric