• State Resolved
  • Locked Locked
  • Replies 10 replies
  • Answers 1 answer
  • Subscribers 99 subscribers
  • Views 1594 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

XDC script and WD timer

LeonL
Intellectual 630 points
Other Parts Discussed in Thread: SYSBIOS

Hi ,all.

I work with c6678 sys/bios 6.41

I try to config timer 1 to be WD timer

.cfg

var Timer = xdc.useModule('ti.sysbios.timers.timer64.Timer');

Timer.timerSettings[1].mode = Timer.Mode_WATCHDOG;

But get error:  "unsupported mODE: 2 is specified for Timer: 1

Although:

Timer.timerSettings[0].mode = Timer.Mode_UNCHAINED;

 Is OK.

Why?

Leon.

  • 0
    TI__Mastermind 32475 points
    Leon,

    Timer.timerSettings is only for configuring the "Shared Timers" on homogeneous devices like CC6678. You should not be using this on Timer0 or Timer1 on your device as those are local timers to those particular cores. Shared Timers do not support "WatchDog".

    The cdoc documentation states this:
    For shared timers on a homogeneous multicore device (ie. c6472), each
    core can create the timer, but only one core will initialize the timer
    and take it out of reset. The core that does the initialization can be
    specified by the module configuration parameter
    timerSettings[].ownerCoreId in the *.cfg file.
    By default, Core 0 is the owner for all shared timers.

    Judah
  • 0 in reply to judahvang
    Intellectual 630 points

    Hi, Judah.

    Thank's.

    Well, I undestened this point. 

    And which way may I config WD timer per core in *.cfg .

    Leon

  • 0 in reply to LeonL
    TI__Mastermind 32475 points
    Leon,

    I looked at the code. It doesn't look like Watch Dog mode is really supported. The only modes really supported are CHAINED and UNCHAINED. I can file an enhancement requests but I do not know if it will get implemented or not as this Timer driver has been in existence for a very long time and we have not seen much interests in adding Watch Dog support.

    Judah
  • 0 in reply to judahvang
    Intellectual 630 points

    Hi Judah.

    At least, honestly and frankly.

    Regards,

    Leon.

  • 0 in reply to judahvang
    TI__Expert 7250 points
    There was a suggested answer and since there has been no active on this thread for more than a week, the suggested answer was marked as verify. Please feel free to select the "Reject Answer" button and reply with more details.
  • 0 in reply to Kenia Guinto
    Intellectual 630 points

    I'm sorry, that went against the rules of the forum.
    Now, with your permission,to the WD issue.
    I started it, and connected to the NMI via RSTMUX register.
    On reason of my application I'd like to suspend the WD to some time.
    But in Timer64p User Guide is written "Once the watchdog timer is activated, it can be disabled only by a watchdog timeout
    event or by a hardware reset. "
    On another side WDTCR have the WDIKEY bits to turn the WD in idle mode
    (counter don't continue count in this mode , if I properly understood).
    I try to run this mode,but it doesn't work. I still get WD timeout triggered.
    This is my function:

    Uint32 DisableWatchdogTimer(void)
    {
    volatile Uint32 WDTCRCoreaddr;
    volatile Uint32 coreNum;

    coreNum = CSL_chipReadReg(CSL_CHIP_DNUM);

    WDTCRCoreaddr = 0x02200028 | (coreNum << 16);
    /* Turn WD to idle kind 1*/
    CSL_FINS (WDTCRCoreaddr, TMR_WDTCR_WDIKEY,1);
    CSL_FINS (WDTCRCoreaddr, TMR_WDTCR_WDIKEY,2);

    /* Turn WD to idle kind 2*/
    // Watchdog timer service key1
    *(volatile Uint32*)(WDTCRCoreaddr) = 0xa5c61000;
    // Watchdog timer service key2
    *(volatile Uint32*)(WDTCRCoreaddr) = 0xda7e2000;

    /* Turn WD to idle kind 3*/
    // Watchdog timer service key1
    *(volatile Uint32*)(WDTCRCoreaddr) = 0xa5c65000;
    // Watchdog timer service key2
    *(volatile Uint32*)(WDTCRCoreaddr) = 0xda7e6000;
    }

    Also I found post on this issue:
    https://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/254216

    If TI support can help in this issue?  
    Thanks in advance,
    Leon.

     

  • 0 in reply to LeonL
    TI__Mastermind 32475 points

    Hi Leon,

    This is a correct statement:  "Once the watchdog timer is activated, it can be disabled only by a watchdog timeout event or by a hardware reset. "

    You cannot "pause" or "halt" a watchdog from happening once it is activated.

    IDLE is a state that the CPU can go into....The documentation is trying to say that if a watchdog is enabled, the CPU cannot go into an IDLE state unless a key is written into the WDIKEY to enable the watchdog in IDLE mode.

    Judah

  • 0 in reply to judahvang
    Intellectual 630 points


    Hi, Judah.

    Thank for you answer.

    But I'm afraid that this is not entirely correct.

    This explanation from TI employee sounds more plausible.

    There it is:

    Okay, so I consulted some of our internal documents on the Timer.

    The 13-12 bits are actually called the WDIKEY instead of WDKEY. It appears the User guide forgot that one letter! Here is the excerpt:

    "The timer can be enabled/disabled to enter in the IDLE via a peripheral IDLE control bit. Once it enabled, the timer immediately enters in the IDLE state, i.e. stops counting, when the CPU has executed an IDLE instruction. This is achieved and controlled by an external clock gating logic. This logic utilizes an output signal, IDLEOUT, from the timer module that indicates the timer is ready to enter in the IDLE state (which is true all the time) and an input signal, IDLEIN, to the timer module to indicate the module is requested to be placed in IDLE state. When the timer is configured as a watchdog timer, it requires a write of 01b followed by a write of 10b into the register bits WDIKEY to enable the watchdog timer in IDLE mode. A write of 00b to the WDIKEY will disallow the watchdog timer goes into the IDLE mode.

    Once the watchdog is enabled, the timer cannot go into an IDLE state unless a proper key is written into the WDIKEY."

    And here's the state diagram for that:

    /cfs-file/__key/communityserver-discussions-components-files/355/2480.idle_5F00_diagram.png

    So who is right.

    Leon.

  • 0 in reply to LeonL
    TI__Mastermind 32475 points

    Leon,

    I'm not sure what you are trying to get at but that post does nothing to contradict the statement below.  Again, I'm not sure you have the right understanding of IDLE here.  The CPU will go into IDLE when it executes the IDLE instruction...Yes, the timer can stop when the CPU goes into IDLE, but as soon as the CPU exits the IDLE state, the Timer is counting again.  The WatchDog has not and cannot be disabled.  As soon as the CPU is no longer in  IDLE state, things will continue as they were....in other words, the watchdog will tick like it was before CPU going into IDLE.  Think of IDLE as "pause"....Timer stops counting while CPU is in IDLE state.  Your program isn't doing anything in this state and as soon as CPU leaves IDLE (because its actually doing something), Timer is counting again.

    This is still THE correct statement:  "Once the watchdog timer is activated, it can be disabled only by a watchdog timeout event or by a hardware reset."

    I am no expert on the hardware but my understanding of watchdog timers has always been that once they are activated, there is nothing a program can do to disable it....If there was, it would defeat the purpose of a watchdog timer.

    Judah

  • 0 in reply to judahvang
    Intellectual 630 points

    Thank's, Judah.

    I understand your answer.
    We'll have to probably use a simple timer as WD.

    Regards,

    Leon.