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DM6467 HPI Problem

Other Parts Discussed in Thread: TMS320DM6467

Hi,

I have problem using the DM6467 HPI port.  I have an FPGA connected to the DSP.  The DSP writes an address into the HPIA register and then sets HINT to cause an interrupt on the FPGA.  The FPGA then reads from the HPID register using auto increment.  After a couple of reads, it clears the interrupt by setting the HINT bit in HPIC register.  I have set-up the HPI port for 16-bit mode, a single HPIA register and I have given full control of the HPIC and HPIA registers to the DSP.  I monitor the signals between the DSP and FPGA with a logic analyzer and I see that the FPGA correctly starts reading once HINT is asserted, and correctly (and successfully) clears the HINT bit after the read transactions.  However, the FPGA always reads 0's (although the memory address pointed to by HPIA contains non zero values.  I also notice that the HRDY line is always asserted (always ready).  I am very sure the peripheral is enabled and powered correctly, otherwise I would not be able to assert and de-assert HINT.  It looks like the DSP never reads the data from the memory.  I then changed to reading without auto-increment and suddenly it works!  But I need auto increment since I do not have time to update the address before each data word.    From the documentation it looks as if the DSP is supposed to pre-fetch the data as soon as the HPIA register is written, but it does not since the HRDY line is never de-asserted.  Am I supposed to set the FETCH bit in in the HPIC register to trigger the fetching of data?  Why does the read with aut-increment not trigger a fetch?  The data sheet clearly states:  "Read bursting can begin in one of two ways: the host initiates an HPID read cycle with autoincrementing, or the host initiates issues a FETCH command (writes 1 to the FETCH bit in HPIC).".  The only "strangeness" in my case is that the host never writes to HPIA.  The DSP writes to HPIA.  Does this matter?

I would appreciate any ideas,

Thanks!

Niki

 

 

 

  • Hi,

     

    I got the HPI interface to work by exchanging the two HCNTL lines.  I have verified that my FPGA is correct, that my board is correct.  I have physically measured the signals on multiple places on the PCB and I can say without doubt that the HCNTL lines on the TMS320DM6467 is swopped either in the HPIS user manual or in the data sheet (the pinouts of the device).  I assuem that the HPI users guide is corerect when it says:

    HCNTL1    HCNTL0   Function

    0                   0                Access HPIC

    0                  1                Access HPIA

    1                  0                Access HPID with autoincrement

    1                  1                Access HPID without autoincrement

    since this is consistent with other HPI documentation for other processors.  The only other option is that the HCNTL0 and HCNTL1 lines in the DM6467 pin-outs are exchanged.  The datasheet states that HCNTL0 is on D5 and HCNTL1 is on B3, but on my chip (TMS320DM6467ZUT7) the two are definitely interchanged.  Can anybody verify this?  

     

    Regards,

    Niki

     

  • Hi,

     

    I had the same issue with HCNTL0/HCNTL1  interchange on DM365. I consulted with our hardware engineers and they confirmed that there is no signals interchange in our design.

    It is good to know that someone else was trapped into the same error in documentation.

  • Exactly,6467t has the same problem, HPI only works when HCNTL1 and HCNTL0 interchanges. There is another issue not compliant with TI's user guide, when 6467 using HPI to boot, it only waits about 5 seconds instead of 50 seconds specified on the doc "Using The DM6467's Bootloader". Such a short period requires the host processor to ack the HINT signal even before enters its operating system.  

    I wonder if guys from TI can address those issues in some official documents. It will greatly help the new designers. 

    Regards 

    Wang Ning

  • Wang:

    Hi, I have some issues with HPI BOOT too.

    In spraas0, it says ‘RBL waits 50 seconds for the HINT to ACK’. I don’t know what ‘ACK’ here means. Does it mean clearing the HINT bit in HPIC register (that is to write 1 to this bit)?

    Moreover, HPI really only waits for 5 seconds for ACK?

    BR

    Zhang

  • Actually, 'ACK' means host should Interrupt DM646x with writing DSPINT bits in HPIC. (of course, you need to clear the host interrupt. btw).

  • Wang:

    To make clear. You mean the host should first clear host interrupt by writing 1 to HINT bit in HPIC. Then host may write HPIC DSPINT bit to 'ACK' the HINT?

  • Hi Wang,

    Would you please look at this new thread? I described my problem in detail there.

    Thank u!

    Zhang