Hi,
I have problem using the DM6467 HPI port. I have an FPGA connected to the DSP. The DSP writes an address into the HPIA register and then sets HINT to cause an interrupt on the FPGA. The FPGA then reads from the HPID register using auto increment. After a couple of reads, it clears the interrupt by setting the HINT bit in HPIC register. I have set-up the HPI port for 16-bit mode, a single HPIA register and I have given full control of the HPIC and HPIA registers to the DSP. I monitor the signals between the DSP and FPGA with a logic analyzer and I see that the FPGA correctly starts reading once HINT is asserted, and correctly (and successfully) clears the HINT bit after the read transactions. However, the FPGA always reads 0's (although the memory address pointed to by HPIA contains non zero values. I also notice that the HRDY line is always asserted (always ready). I am very sure the peripheral is enabled and powered correctly, otherwise I would not be able to assert and de-assert HINT. It looks like the DSP never reads the data from the memory. I then changed to reading without auto-increment and suddenly it works! But I need auto increment since I do not have time to update the address before each data word. From the documentation it looks as if the DSP is supposed to pre-fetch the data as soon as the HPIA register is written, but it does not since the HRDY line is never de-asserted. Am I supposed to set the FETCH bit in in the HPIC register to trigger the fetching of data? Why does the read with aut-increment not trigger a fetch? The data sheet clearly states: "Read bursting can begin in one of two ways: the host initiates an HPID read cycle with autoincrementing, or the host initiates issues a FETCH command (writes 1 to the FETCH bit in HPIC).". The only "strangeness" in my case is that the host never writes to HPIA. The DSP writes to HPIA. Does this matter?
I would appreciate any ideas,
Thanks!
Niki