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edma3 AXEVT signal not being generated from MCASP module

caleb crome
Prodigy 50 points

Hello, 

  I'm using our custom C6745 board, trying to bring up EDMA with the McASP, without using the BSP.  The BSP footprint is simply too large (we don't have any external RAM), and when I compiled the BSP DMA and McBSP drivers in, they were something like 150k combined.  

Anyway, I'm using the CSL directly, which seems to work fine, except that, well, it doesn't.  

I can get the McASP to work in interrupt mode just fine, and it generates the XDATA trigger in XSTAT.  That's good.

I can get the EDMA3 to work just fine for a manually triggered memory -> memory transfer.  That's also good.

However, I can't seem to get the MCASP to generate an AXEVT synchronization signal to the EDMA3.  

Here's my setup:

Clocking:  

AHXCLK = 12 MHz -> CODEC MCLK (output from C6747)

CODEC has internal PLL and generates XCLK and FSCLK (i.e. they are input to the C674x).

I'm using Serializer 7 for TX from C674x, and serializer 8 for RX to C674x.

I'm following the instructions in SPRUFM1-August 2009, section 2.4.1.2.

I'm using TDM mode with 8 slots.  All 8 slots active.

In section 2.4.1.2.8 it states, "As soon as the transmit serializer is taken out of reset, XDATA in the XSTAT register is set, indicating the XBUF is empty and ready to be serviced.  The XDATA status causes a DMA event and AXEVT to be generated..."  

I do get the XDATA as stated, but I don't seem to get the AXEVT.  The way I'm checking to see if I get an AXEVT is by looking at the edma3->ER register.  Is this the correct way to check? 

I have carefully followed section 2.4.1.2 to ensure all the clocks are set up at the right time, and done all checks.  

My code is attached.  I get very stuck at step 8, since there doesn't seem to be any AXEVT generated, I can never verify the XDATA bit.  When I manually write the XBUF, it does appropriately set XDATA, but still no AXEVT for the DMA.

Is there something I'm missing, maybe some global register that allows communication of the AXEVT signal from McASP to EDMA3?  

 

  • 0
    Prodigy 50 points

    I fixed the problem, but I'm not 100% sure of the exact fix.  One problem is that I used the McBSP example code for the DMA.  That was a problem because it only takes 1 word per DMA event, so A count was wrong.   I send 32, 32-bit words at a time, so A count must be the same as the FIFO RNUMEVT and WNUMEVT.

    There may have been some other problems, in the configuration.  I now have a working DMA+McASP in about 4k bytes combined, instead of the 140k bytes required for the PSP.  

    I'll post a solution to the wiki once I have it cleaned up properly.

    -Caleb

  • 0 in reply to caleb crome
    TI__Guru* 84110 points

    caleb crome said:
    I'm not 100% sure of the exact fix. ...

    There may have been some other problems, in the configuration.

    If you have it working, you probably have the McASP and DMA channels configured right.

    In an application that needs such a small code footprint, I am surprised that you need to use the Event Combiner Module for your interrupts. You get 12 direct interrupts, minus one for the CLK timer if you are using DSP/BIOS. So if you only need the three EDMA interrupts (from each TC) and a handful of others, there is no reason to go through the extra level of hierarchy. If it is easier that way, that is understandable. Maybe I am all wrong, but that was something I noticed.

    Or you could send the operationally important interrupts direct, like 8 for the EDMA_CC_INT1, and use ECM for the error interrupts 56-58 that do not happen as often.

    I would recommend adding in all the bits you are not setting for the PARAM.OPT register. This will make it easier to notice quickly if you are using final interrupts and not intermediate interrupts, Async vs. ABsync, etc.

    You have probably learned enough not to need it, but in the Training section of TI.com, there is a training video set for the C6474. It may be helpful for you to review a few of the modules. But in particular, the EDMA3/QDMA/IDMA Module will apply to your current questions. You can find the complete video set at http://focus.ti.com/docs/training/catalog/events/event.jhtml?sku=OLT110002 . The C64x+ Megamodule Features module covers the Interrupt Controller and talks about the Event Combiners, but it uses a functional-layer CSL instead of the BIOS calls; the concepts are there, though.

  • 0 in reply to RandyP
    Prodigy 180 points

    Hi all

    I am experiencing the same problem trying to get the LogicPD C6748 SOM to do McASP EDMA3 transfers. I can run the EDMA3 memory to memory, and I can send waveform data in a polled mode from the McASP, but I dont seem to be able to service the McASP from the EDMA.

    I have also looked at the ER in the EDMA3 and try setting the SER bit for event 1 (McASP tx) but am unable to get the system running properly. I also experienced a breakthrough - and then suddenly it stopped working. I do not know why?

    Is it possible to post the working code?

    My code makes use of the EDMA3 LLD and also uses the C6748 example code from Logic. I also would like to avoid the PSP as my attempts to get it going were not very fruitful. My code is attached.

    Regards

    Ian