Part Number: OMAP5432-EVM
OMAP5432_ES2_v0.94.txtReference:
"https://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/395688"
I'm trying to get the use the bscan bus on the OMAP5432 / 5432A0GPAANRQ1 to test the DDRs that are connected to it. I have the bsdl that is attached.
I have the basic part of the JTAG working, ie: IDcode, Instruction capture, boundary registry length & bypass, Integrity.
When extest instruction is selected for interconnect testing, most of the pins on the DDRs are stuck low "0".
When I try to test DDRs the pins that drive the signals to the DDR bus fails... I guess this is because bscan cells are self diagnose and check what is injected to the bus... So it reads nothing on the BUS.
"0" although pin is indicated to be driven "1".
Talking with a Keysight Specialist who has more experience indicates that some private instructions me be required to enable DDR bus. That is protected against some hacking issue.
Is there anything special that is required to do, any special command or pin to be tied/toggled.
Tool used X1149 Keysight.
Emu0/emu1 are tested in different combinations and still the same failure. (if emu1 is "0" and emu0 is "1" bscan bus is dead)
| emu0 | emu1 | bsdl work |
| 0 | 0 | OK |
| 0 | 1 | OK |
| 1 | 0 | NOK |
| 1 | 1 | OK |
Regards.
