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Linux/AM5728: How to configure AM5728 as two PCIe RC single lane RCs

Part Number: AM5728

Tool/software: Linux

We are utilizing an AM5728 design similar to the EVM.

We'd like to setup the PCIe SS1 SS2 as two separate single lane RCs.

1) Does the dra7 driver support this configuration?

2) Can you provide assistance in how to achieve this?

We have the single controller two lane mode working.  I suspect that breaking it into two controllers requires changes to the dra7.dtsi section:

                        pcie1_rc: pcie_rc@51000000 {
                                compatible = "ti,dra7-pcie";
                                reg = <0x51000000 0x2000>, <0x51002000 0x14c>, $
                                reg-names = "rc_dbics", "ti_conf", "config";
                                interrupts = <0 232 0x4>, <0 233 0x4>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                device_type = "pci";
                                ranges = <0x81000000 0 0          0x03000 0 0x0$
                                          0x82000000 0 0x20013000 0x13000 0 0xf$
                                #interrupt-cells = <1>;
                                num-lanes = <1>;
                                linux,pci-domain = <0>;
                                ti,hwmods = "pcie1";
                                phys = <&pcie1_phy>;
                                phy-names = "pcie-phy0";
                                interrupt-map-mask = <0 0 0 7>;
                                interrupt-map = <0 0 0 1 &pcie1_intc 1>,
                                                <0 0 0 2 &pcie1_intc 2>,
                                                <0 0 0 3 &pcie1_intc 3>,
                                                <0 0 0 4 &pcie1_intc 4>;
                                status = "disabled";
                                pcie1_intc: interrupt-controller {
                                        interrupt-controller;
                                        #address-cells = <0>;
                                        #interrupt-cells = <1>;
                                };
                        };

 

  • I've found further on down in the file a reference that looks like it can be configured to be the second RC in axi@1:


    axi@1 {
    compatible = "simple-bus";
    #size-cells = <1>;
    #address-cells = <1>;
    ranges = <0x51800000 0x51800000 0x3000
    0x0 0x30000000 0x10000000>;
    status = "disabled";
    pcie@51800000 {
    compatible = "ti,dra7-pcie";
    reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
    reg-names = "rc_dbics", "ti_conf", "config";
    interrupts = <0 355 0x4>, <0 356 0x4>;
    #address-cells = <3>;
    #size-cells = <2>;
    device_type = "pci";
    ranges = <0x81000000 0 0 0x03000 0 0x00010000
    0x82000000 0 0x30013000 0x13000 0 0xffed000>;
    #interrupt-cells = <1>;
    num-lanes = <1>;
    linux,pci-domain = <1>;
    ti,hwmods = "pcie2";
    phys = <&pcie2_phy>;
    phy-names = "pcie-phy0";
    interrupt-map-mask = <0 0 0 7>;
    interrupt-map = <0 0 0 1 &pcie2_intc 1>,
    <0 0 0 2 &pcie2_intc 2>,
    <0 0 0 3 &pcie2_intc 3>,
    <0 0 0 4 &pcie2_intc 4>;
    pcie2_intc: interrupt-controller {
    interrupt-controller;
    #address-cells = <0>;
    #interrupt-cells = <1>;
    };
    };
    };

    I'm going to try setting this up as pcie2_rc in the axi@0 section.
  • No joy yet, any advise would be appreciated. Thanks.
  • Trying to get just the second pcie rc working. Disable pcie1_rc and enable just the SS2 configuration. The device driver fails. Here is a comparison between the working and the non working dmesg log output.

    Working pcie1_rc (SS1):

    [ 1.842894] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128
    [ 1.846509] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges:
    [ 1.846521] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus
    00-ff]
    [ 1.846555] IO 0x20003000..0x20012fff -> 0x00000000
    [ 1.846576] MEM 0x20013000..0x2fffffff -> 0x20013000
    [ 1.848891] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00
    [ 1.848905] pci_bus 0000:00: root bus resource [bus 00-ff]
    [ 1.848916] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
    [ 1.848927] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff]
    [ 1.848962] pci 0000:00:00.0: [104c:8888] type 01 class 0x060400
    [ 1.849005] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff]
    [ 1.849027] pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff]
    [ 1.849092] pci 0000:00:00.0: supports D1
    [ 1.849102] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
    [ 1.849356] PCI: bus0: Fast back to back transfers disabled
    [ 1.849521] pci 0000:01:00.0: [10b5:8606] type 00 class 0x060400
    [ 1.849551] pci 0000:01:00.0: ignoring class 0x060400 (doesn't match header t
    ype 00)
    [ 1.849791] PCI: bus1: Fast back to back transfers disabled
    [ 1.849872] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff]
    [ 1.849886] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff]
    [ 1.849899] pci 0000:00:00.0: PCI bridge to [bus 01]
    [ 1.850136] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt
    [ 1.850146] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
    [ 1.850158] pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded
    [ 1.850313] aer 0000:00:00.0:pcie02: service driver aer loaded
    [ 1.851267] backlight supply power not found, using dummy regulator

    Failing pcie2_rc (using the axi@1 section, just add pcie2_rc tag to the pcie_rc configuration):

    [ 1.842885] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128
    [ 1.846184] dra7-pcie 51800000.pcie: probe deferral not supported
    [ 1.847099] backlight supply power not found, using dummy regulator
  • Haven't completely tested the solution yet, but seem to have got it working. Now see two bridges and our PCI switches underneath them.

    1) In dra7.dtsi, modify the axi@1 section, comment out the status = "disabled" and move it below the interrupt-map part similar to how pcie1_rc is setup. Change pcie@51800000 to pcie2_rc: pcie@51800000 .

    2) In the upper level .dtsi file (am57xx-evm-common.dtsi in our case) add the following:

    &pcie2_phy {
    /* status = "disabled"; */
    status = "okay";
    };

    &pcie2_rc {
    /* status = "disabled"; */
    status = "okay";
    };

    pcie2_phy is disabled by default unlike pcie1_phy so it requires being enabled before the second RC will work. Failure to enable pcie2_phy results in an error dra7-pcie 51800000.pcie: probe deferral not supported.
  • Hi Chris,

    Thanks for sharing the solution.

    Regards,
    Pavel