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Linux/DRA756: How to config the 2GB DDR on DRA75x

Part Number: DRA756

Tool/software: Linux

Hi experts:

I use processor sdk 3.02.00.03 to config 2GB DDR on DRA75x. But it can not access 0xFF00_0000 ~ 0xFFFF_FFFF in u-boot.

EMIF1 --> 4Gb * 2 = 1GB
EMIF2 --> 4Gb * 2 = 1GB

const struct dmm_lisa_map_regs lisa_map_dra7_2GB = {
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x80740300,
.dmm_lisa_map_3 = 0xFF020100,
.is_ma_present = 0x1
};

.dmm_lisa_map_2 = 0x80740300,(SYS_ADDR = 0x8000_0000, SYS_SIZE = 2GB, SDRC_INTL = 128 byte interleaving, SDRC_ADDRSPC = 0x00 (SDRAMs), SDRC_MAP = EMIF1 and EMIF2 interleaved,SDRC_ADDR = 0x0000_0000)

.dmm_lisa_map_3 = 0xFF020100,(SYS_ADDR = 0xFF00_0000, SYS_SIZE = 16MB, SDRC_INTL = no interleaving, SDRC_ADDRSPC = 0x02 (SDRAMs), SDRC_MAP = EMIF1, SDRC_ADDR = 0x0000_0000)

after change the lisa map to below. it can access 0xFF00_0000 ~ 0xFFFF_FFFF in u-boot

const struct dmm_lisa_map_regs lisa_map_dra7_2GB = {
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x80740300,
.dmm_lisa_map_3 = 0x0,
.is_ma_present = 0x1
};

why did we set dmm_lisa_map_3 = 0xFF020100?

BR

Joe

  • Hi Joe

    The 16M region configured in DMM section-3 is reserved region for Tiler to trap unmapped tiler entries. The u-boot deducts this 16MB area from total DDR size 2G before passing to kernel. The DDR size is 2GB minus 16MB.

    Regards
    Ravi
  • Hi Ravi,

    Thanks for your update.

    Is this DMM section-3 reserved for Tiler fixed to 16MB? Can we change this size?

    I am not clear what is the function of this reserved region for Tiler, it is used to story the address translation table? Could you please give more details?

    Regards

    Joe

  • Hi Ravi,

    Did the Tiler function enable in latest processor sdk or android SDK? which use-case can i use to test the tiler function?
    Customer want to check whether they can disable tiler function?

    Regards
    Joe
  • Joe
    In general the Tiler region is used for supporting Scatter-gather functionality (in tiler 1-D mode). By default the video buffers(used for display, multimedia) are allocated as scatter gather list of pages and mapped contiguously using the Tiler entries. If you do not want to use Tiler at all, we will need other means to manage allocation of contiguous large buffers needed for video buffers - linux supports CMA region as an option - though this may not be the default path for video buffer allocation.

    Also,Please clarify on the SDK version that you are using

    If Tiler is used(which is the default option), then we need to able to trap access to unmapped entries in the Tiler table.

    Referring back to the GIt commit message that added support for the tiler trap section
    " The unmapped entries in tiler space are set with
    values 0xFF. So creating a DMM section of
    size 16MB at 0xFF000000 with ADDRSPACE set to 0x2.

    This way all the unmapped entry accesses to tiler
    will be trapped by the EMIF and a error response
    is sent to the L3 interconnect. L3 errors are
    inturn reported to MPU.

    Note that here the tiler trap section is overlapping
    with the actual ddr physical space and we lose 16MB
    out of the total 2GB. "


    In summary, would anticipate that the Tiler module gets used for mapping scatter gather page list for video buffers and the 16MB region is required in such cases to trap unmapped entry accesses to tiler.

    Regards
    Sriram
  • Hi Sriram,

    thank you very much for your detail explains.
    I tested latest android SDK 6AM.1.3 to set dmm_lisa_map_3 to 0 on Rev-H. basic function is ok.
    I will try it on processor SDK 3.02.00.03.

    Regards
    Joe