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Tool/software: Linux
Hi experts:
I use processor sdk 3.02.00.03 to config 2GB DDR on DRA75x. But it can not access 0xFF00_0000 ~ 0xFFFF_FFFF in u-boot.
EMIF1 --> 4Gb * 2 = 1GB
EMIF2 --> 4Gb * 2 = 1GB
const struct dmm_lisa_map_regs lisa_map_dra7_2GB = {
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x80740300,
.dmm_lisa_map_3 = 0xFF020100,
.is_ma_present = 0x1
};
.dmm_lisa_map_2 = 0x80740300,(SYS_ADDR = 0x8000_0000, SYS_SIZE = 2GB, SDRC_INTL = 128 byte interleaving, SDRC_ADDRSPC = 0x00 (SDRAMs), SDRC_MAP = EMIF1 and EMIF2 interleaved,SDRC_ADDR = 0x0000_0000)
.dmm_lisa_map_3 = 0xFF020100,(SYS_ADDR = 0xFF00_0000, SYS_SIZE = 16MB, SDRC_INTL = no interleaving, SDRC_ADDRSPC = 0x02 (SDRAMs), SDRC_MAP = EMIF1, SDRC_ADDR = 0x0000_0000)
after change the lisa map to below. it can access 0xFF00_0000 ~ 0xFFFF_FFFF in u-boot
const struct dmm_lisa_map_regs lisa_map_dra7_2GB = {
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x80740300,
.dmm_lisa_map_3 = 0x0,
.is_ma_present = 0x1
};
why did we set dmm_lisa_map_3 = 0xFF020100?
BR
Joe
Hi Ravi,
Thanks for your update.
Is this DMM section-3 reserved for Tiler fixed to 16MB? Can we change this size?
I am not clear what is the function of this reserved region for Tiler, it is used to story the address translation table? Could you please give more details?
Regards
Joe