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Linux/AM5728: McSPI interface fails

Part Number: AM5728
Other Parts Discussed in Thread: AM3352

Tool/software: Linux

Hello,

We are trying to interface a MCP2515 to MCSPI4, where D0 is output and D1 is input. I can see that there is CLK, CS, MOSI and MISO, but the mcpsi controller driver always reads value 0x0 from MISO.

Just to add I have configured the pinmux correctly.

Thanks,

--

  • Hello,

    Following is my DT:

    SPI Pinmux:

                        pinmux_spi4 {
                            pinctrl-single,pins = <
                                        0x60 0x40008 /* spi4_sclk (gpmc_a8) */
                                        0x64 0x40008 /* spi4_d1 (gpmc_a9) MISO */
                                        0x68 0x10008 /* spi3_d0 (gpmc_a10) MOSI */
                                        0x6c 0x20008 /* spi4_cs0 (gpmc_a11) */
                                          >;
                            linux,phandle = <0x181>;
                            phandle = <0x181>;
                        };

    SPI Node:


      spi@480ba000 {
              compatible = "ti,omap4-mcspi";
              reg = <0x480ba000 0x200>;
              interrupts = <0x0 0x2b 0x4>;
              #address-cells = <0x1>;
              #size-cells = <0x0>;
              ti,hwmods = "mcspi4";
              ti,spi-num-cs = <0x1>;
              dmas = <0xc9 0x46 0xc9 0x47>;
              ti,pindir-d0-out-d1-in;
              dma-names = "tx0", "rx0";
              status = "okay";
              pinctrl-names = "default";
              pinctrl-0 = <0x181>;

              can3@0 {
                   compatible = "microchip,mcp2515";
                   spi-max-frequency = <10000000>;
                   spi-cs-high;
                   reg = <0>;
                   interrupt-parent = <0xc5>;
                   interrupts = <18 0x2>;
                  clocks = <0x400>;
            };
    };

    Thanks,
    -Mike

  • Do you have input enabled on the SCK pinmux? This is requires for proper functioning.
  • Hi,

    Yes I have enabled input to SCK,

    Following is my pinmux to spi4 pins:

    pinmux_spi4 {
    pinctrl-single,pins = <
    0x60 0x40008 /* spi4_sclk (gpmc_a8) */
    0x64 0x40008 /* spi4_d1 (gpmc_a9) MISO */
    0x68 0x10008 /* spi3_d0 (gpmc_a10) MOSI */
    0x6c 0x20008 /* spi4_cs0 (gpmc_a11) */
    >;
    linux,phandle = <0x181>;
    phandle = <0x181>;
    };

    As per above " 0x60 0x40008 /* spi4_sclk (gpmc_a8) */" BIT(18) is set to 1 which is input.

    Thanks,
    Mike
  • I have notified the software team to check this. They will respond here.
  • Which SDK is this?

    Best Regards,
    Yordan
  • Hi,

    I am using the latest sdk release 03.03.00.

    Thanks,
    Mike
  • Hi,

    I am using the yocto ti-layer which has 4.4 release. I also had a look at the 4.9 branch on git and I see no major difference in the omap2-spi driver and mc2515 driver.

    I am trying to get it working in mode 0 , I also tried the mode 1 but with no luck. I even followed [1] seems like the controller driver works on am3352 but not on Am572x.

    [1] e2e.ti.com/.../2113031

    Thanks,
    -Mike
  • Hi Mike,

    Check the values of the CTRL_CORE_PAD_GPMC_A9, CTRL_CORE_PAD_GPMC_A10 & CTRL_CORE_PAD_GPMC_A11 registers with devmem2.

    If you're using the latest SDK you should configure the SPI4 pinmux settings in u-boot/board/ti/am57xx/mux_data.h.

    Latest ti linux releases changed & now the pinmux settings are done in u-boot, not in dts.

    If you still wish to use dts for pinmux settings, then try the following settings:
    spi4_pins: spi4_pins {
    pinctrl-single,pins = <
    DRA7XX_CORE_IOPAD(0x3460, (PIN_INPUT | MUX_MODE8))
    DRA7XX_CORE_IOPAD(0x3464, (PIN_INPUT | MUX_MODE8))
    DRA7XX_CORE_IOPAD(0x3468, (PIN_INPUT | MUX_MODE8))
    DRA7XX_CORE_IOPAD(0x346C, (PIN_INPUT | MUX_MODE8))
    >;
    };

    Best Regards,
    Yordan
  • Hi,

    Thanks for the reply.

    Yes I can confirm that dev2mem is reporting proper pinmux values.

    Is the motrolla mode 0 0, different TI mode 0 0 as I came across this thread [1] . I thought it should just work as it just works straight of
    referring to thread [2]

    [1] e2e.ti.com/.../207305

    [2] e2e.ti.com/.../2113031

    Thanks,
    Mike
  • Hi Mike,

    TI Mode 0 0, means POL = 0 (MCSPI_CHxCONF[1] POL = 0x0) & PHA = 0 (MCSPI_CHxCONF[0] PHA = 0x0) or the SPI works with spi_sclk is active high and sampling occurs on the rising edge.

    You can see all SPI modes (depending on spi_clk polarity & phase settings) in Table 24-291. Phase and Polarity Combinations. Try a different mode to see if it will impact the behavior of your system.

    Best Regards,
    Yordan
  • Hi Yordan,

    I have scoped the pin on the processor and I can see that there is valid data coming out (I used a logic analyzer), but I still see the mcspi driver reads 0x0. Is it I need to re-read the register again for Rx as its just one byte ?

    could you please help me here.

    Thanks,
    Mike
  • But I can see that mcspi driver is still reading 0x0.

    Thanks,

    Mike

  • Hi Mike,

    Unfortunately I have no way of recreating your issue.

    Is it I need to re-read the register again for Rx as its just one byte ?

    Yes try this & see if the behaviour would change.

    Can you share the SPI register values? Maybe there is something wrong with the configuration of the interface .

    Best Regards,
    Yordan