Customer having following issue for a product in production. Please advise thoughts and recommendations for debugging given clock input circuitry:
I have a unit that is resetting very infrequently and ( 2 more units that I have seen). I had narrowed it down to a cpld that controlled our resets and then found it still reset which the DSP was driving(RSTOUT) low (net DSP_RSTOUT_L). This was because our crystal input, Y4 (27MHz) was dropping out (27MHz to ground). I confirmed this with an oscope on the Crystal output and the DSP reset output. The crystal output died (to 0) and the DSP detected it and drove the dsp output reset to 0. This shut down our system. Our terminal (rs-233) would stop when the dsp reset which occurred at the same time of the cpld dropped out. This happened to be thermal related. If I let the system cool off it would work longer and then reset ( minutes). If hot it would restart and reset 10 to 15 seconds after boot up.
The dsp data sheet shows that the dsp reset can be driven based on a bad crystal input. This is how we found it. See datasheet snipet:
I changed the crystal to new one and it worked at room temp. It failed at 40C in the chamber.
Then I wanted to confirm the 2 caps (18pf) were good and replaced them. It has not failed since over temperature (40C to 50C). Then ramp to 70C.
I have removed one cap C506 now to see if the cap was open and had bad solder at temperature.
When I probe these caps with a probe to ground it affects the amplitude. I also remove the ground and the amplitude is different too. I probed on both sides of the cap with 2 probes and see the phase is almost 180 degrees but not exact.
I measured the original caps and they measured 17 to 18pf with the handheld meter I have.
Our circuit:
Crystal is a 27MHz. Saronix NES6NED1-27.0000-18. 18pf load capacitance.
The caps are 18pf 2% caps. ATC manufacturer. 600l180-GT200.
See attached for crystal specs.SARONIX_NES6NED1-27_0000.pdf
