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66AK2H12: Hyperlink : Address translation configuration

Chanseok Kang
Intellectual 370 points

Part Number: 66AK2H12

Hi, Again.

I have a few questions related on hyperlink Address translation configuration.

Environment : I am working on custom board with 2 66ak2h12 which are connected with hyperlink lane. It works in baremetal (No-BIOS)

Situation : I want to map local memory area(which is located in MSMCSRAM) to hyperlink data area. (start address : 0x0C180000 size : 0x30000)

I know that segment size should be defined in power of 2. So I made 2 segments(0x20000 + 0x10000). here is my configuration:

Tx Address Overlay Control Register(0x1C) : 0x00000C0A

Rx Address Selector Control Register(0x2C) : 0x00000C01

Rx PrivID Table : Not used

Rx Segment Table :

 0 - 0x0C180010
 1 - 0x0C1A000F

 When I defined the configuration above. looks fine. But I found that allocated areas are duplicated in every 0x1000000 (0x40000000, 0x41000000, 0x42000000).

Question : 

 1) Am I mis-configured the address translation? Actually, the hyperlink example(included in pdk package) is too ambiguous to understand. It just contained the case of internal loopback. Are there any examples I can refer(especially on address translation)?

 2) If I mis-configured the address translation, is it possible to lower the hyperlink throughput due to that?

 3) What`s the rule of PrivID and security bit? Are these related on calculating address?

Thanks in advance, and sorry for bad english.

Best regards,

chanseok.

  • 0
    TI__Guru**** 161600 points
    Hi,

    [qutoe] 1) Am I mis-configured the address translation? Actually, the hyperlink example(included in pdk package) is too ambiguous to understand. It just contained the case of internal loopback. Are there any examples I can refer(especially on address translation)?


    Check the examples in this thread:
    e2e.ti.com/.../433739

    2) If I mis-configured the address translation, is it possible to lower the hyperlink throughput due to that?

    I think this is possible.

    3) What`s the rule of PrivID and security bit? Are these related on calculating address?

    Let me check on this and I will get back later with my findings.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    Intellectual 370 points
    Thanks a million!

    I have one more thing to be confirmed.
    Is it guaranteed to write memory in remote memory through hyperlink using c standard memory operation (memcpy(), memset() etc..)
    For example, One device writes some pattern in 0x40000000 via memset(), is the hyperlink transaction time same as memset() operation time?

    Thanks again.

    Chanseok.
  • 0 in reply to Chanseok Kang
    TI__Guru**** 161600 points
    Hi,

    Is it guaranteed to write memory in remote memory through hyperlink using c standard memory operation (memcpy(), memset() etc..)

    Yes, I think this should be guaranteed.

    One device writes some pattern in 0x40000000 via memset(), is the hyperlink transaction time same as memset() operation time?

    Not sure that I fully understand this. You could use the hyplnk 6BiosExampleProject to benchmark the hyplnk communication & compare to the other case ' device writes some pattern in 0x40000000 via memset()'. Personally I haven't compared both cases.

    Best Regards,
    Yordan