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TMS320C6747: Question about access to SPI Flash

Masato Miyashiro
Expert 1500 points
Part Number: TMS320C6747

Hi,

My customer is using C6747.
They have the same question as E2E below.
e2e.ti.com/.../305054

Is it OK after RESETOUT is released for access to SPI Flash by RBL?

Best Regards,
Miyashiro

  • 0
    TI__Guru 65405 points
    I've forwarded this to the hardware experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • 0 in reply to Cvetolin Shulev-XID
    Expert 1500 points
    Hi,

    Do you have any update on this issue?

    Best Regards,
    Miyashiro
  • 0
    TI__Mastermind 30120 points

    Miyashiro-san,

    I was unable to find in the documentation where it states that SPI0_SCS[0] or SPI1_SCS[0] will remain high until RESETOUT is deasserted (goes high), but the datasheet does say that "all pins are tri-stated with the exception of RESETOUT which remains active through the reset sequence". See 6.4.1 Power-On Reset (POR).

    Therefore, the bootloader cannot possibly attempt to access any memory device until after the pins are released from tri-state (after RESETOUT is released).

    RESETOUT will be asserted until the device has completed executing its reset sequence. Table 6-1 in the datasheet specifies 6169 OSCIN cycles, which is between 206uS to 514uS given that OSCIN can be between 12MHz and 30MHz.

    Can you just measure the time between RESETOUT and SPI0_SCS[0] or SPI1_SCS[0] going low to verify this?

    Hope this helps,
    Mark