66AK2G02: SYSOSC Single Ended Input - Clear clarification of documentation needed

Debora

Part Number: 66AK2G02

I have the same question as a previous poster, and the response on the previous thread does not answer my question.

See https://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/613768

The previous poster asked about the voltage levels for a single-ended input to the SYSOSC_IN pin, and the TI employee answered ambiguously, saying that it's a 1.8V input and that it is LVCMOS-compatible. But the LVCMOS family is often used as 3.3V I/O, so it's not very clear to say it's "LVCMOS-compatible."

The problem is that the K2G datasheet SPRS932E says that the pin has 1.8V levels (see the description of ball AC19 in Table 4-1 on page 36) and also that it supports LVCMOS-compatible levels when an external oscillator is used (see Table 4-24 and section 5.9.3.1.2. Indeed, Table 5-14 specifically calls out "3.3V mode" for the pin in the row describing the input current. The mention of "3.3V mode" in table 5-14 and the description of the pin as "LVCMOS-compatible" makes it sound like the pin supports 3.3V levels.

Regards,

Debora

over 7 years ago

0 Debora over 7 years ago

Intellectual 645 points

Just to make sure my question is clear, it is this: Is SYSOSC_IN 1.8V only, or can it be driven by a 3.3V source?

0 Yordan Kovachev over 7 years ago in reply to Debora

TI__Guru**** 161600 points

Hi,

This is stated in Table 4-1. Pin Attributes. The SYSOSC_IN I/O voltage is 1.8V only. I am not able to find anything regarding the 3.3V mode, except the mention of it in table 5-14.

Let me clarify this with the factory team.

Best Regards,
Yordan

0 Debora over 7 years ago in reply to Yordan Kovachev

Intellectual 645 points

Hi Yordan,

Thanks for going to check with the factory team. I look forward to their clarification because the datasheet seems poorly written on this point.

Regards,
Debora

0 Bill Taboada over 7 years ago in reply to Debora

TI__Mastermind 42545 points

Hi Debora,
Table 5-14 is still in the process of being updated. I suspect that the '3.3V mode' comment is a cut and paste error within the table that will be removed when the table is updated. Regardless the SYSOSC_IN buffer is powered using the DVDD18 rail and is only compatible with the 1.8V LVCMOS levels defined in Table 5-5. I will follow up on the data sheet and get it corrected.
Regards, Bill

0 Debora over 7 years ago in reply to Bill Taboada

Intellectual 645 points

Hi Bill,

Thank you. That is what I needed to know.

Regards,

Debora

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66AK2G02: SYSOSC Single Ended Input - Clear clarification of documentation needed