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SPI Communication - Data Repeat

Bandeg
Expert 1140 points

Hi

This is simlar to the following link but different enough to start a new thread.

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/99/t/41881.aspx

I am using DM6437 McBSP configured as a SPI slave and using the EDMA and McBSP drivers provided (pspdrivers_1_10_03)

It is used for serial comm between an power PC and DM6437.

Every couple of hours of SPI operation,  we receive a repeated byte at the Master.   (our word size is a byte)

It can be anywhere in transfer, the transfers are relatively small and most are less than 256 bytes.

Should we suspect the EDMA, or the SPI /McBSP.   Any ideas?

Regards,

--B

  • 0
    TI__Expert 5955 points

    Hi Bandeg,

    I would suspect the EDMA, maybe the EDMA bandwidth. It could be the EDMA would not be able write the data into the DRR in the timely fashion.

    Thanks and regards,

    Tai Nguyen

  • 0 in reply to Tai Nguyen
    Expert 1140 points

    Thanks,

    This system is pulling in Video on the VPFE and using the resizer and using the EDMA for (non-video) data SPI transfers at a rather low data rate (under 50 kbits/sec).

    Could this be over stressing the EDMA?  What throughput can I expect (DM6437 is 700 MHz).

    Regards,

    -B

  • 0 in reply to Bandeg
    TI__Genius 14405 points

    Hi,

    VPSS doesn't use EDMA, it has its own DMA, so we are not overloading EDMA here. However, we might be overloading DDR.

    Please try putting whatever data you have for SPI in internal memory or only resize half the video buffer and see if it helps.

    What other activity is there in your system?

  • 0 in reply to Paul.Yin
    Expert 1140 points

    Good ideas.

    When you suggest internal memory do you mean L1DSRAM?   Is this memory freely available for me to use or does the system use it.  Otherwise what internal memory would you suggest?

    I noticed that the buffer I am handing to the driver has been MEM_malloc'ed and will be cached.  From my review of the McBSP driver, the data buffer is being flushed in the driver.    Do I need to explictly flush from my application before calling the GIO_submit()?

    There is another thread that is generating the data for the SPI that is running an intensive algorithm.   It is using instruction (software) pipelining so there are periods where the interrupts are disabled though we have encountered this problem when software pipelining is disabled (-mu).

    We have been running this more and have observed more than just one repeat, and sometimes we receive unexpected data.

  • 0 in reply to Bandeg
    TI__Genius 14405 points

    Yes, I meant L1D. I am not familiar with this BIOS driver. You might need to post another question in the BIOS forum.