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No, you can not avoid wait0 pin. For NAND boot, ROM Code require gpmc_wait0 pin to be used. ROM Code can not be modified. You can boot/load first stage bootloader from another source (i.e. OneNAND) then load second stage bootloader, kernel and rootfs from NAND.
What happens if I always Pull that signal high while booting?
Whether there is any constant state(Pull up/Pull down/or any sequence) for that signal while booting or it must be tied to R/B# pin of NAND Flash?
I didn't connected gpmc_wait0 signal, it is just just unconnected (internally pulled up). I want to boot my processor from NAND Flash, but not booting. That's why asked this question.
Now, I understand gpmc_wait0 signal is required for initial communication with NAND FLASH(written in RBL). After loading gpmc controller, we set that waitreadmonitoring pin to 0 so wait0 pin is not reqired.
