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RTOS/TMS320C6657: EMIF NAND/NOR Flash example code

Part Number: TMS320C6657

Tool/software: TI-RTOS

Hello

I have been working with the 6000 series DSPs for several years, with a homegrown RTOS. We are now moving to the C6655 platform using TI-RTOS(SYS-BIOS) instead. I have had success with using the provided examples, however I do not see any examples related to accessing FLASH devices on the EMIF bus. I do see that other TI processors use the GPMC driver to access these devices, but not the C66x DSPs. Under the \ti\pdk_c665x_2_0_8\packages\ti\board\src\flash\nand directory there is code that relies on the GPMC driver.

There is also some code in the C:\ti\pdk_c665x_2_0_8\packages\ti\platform\evmc6657l\platform_lib directory that deals with NAND and NOR memory access, but this relies on the platform library, rather than the board library, which the MCSDK to Processor SDK Migration document states is deprecated.

Are there any NAND/NOR access examples available that use the EMIF interface, and the board library?

Thank you for any direction you could provide

Sean

  • Sean,

    Your observation is correct. For C66x devices which were earlier supported using MCSDK baseline software, the flash programming uses platform library and not the board library. C665x devices contains EMIF16 IP which is a different parallel interface to connect async flash memory. EMIF16 doesn`t have a LLD driver interface but is supported through CSL-FL and paltform library.

    We also provide a NAND flashing utility at the following location that you can use as a starting point.
    pdk_c667x_X_X_X\packages\ti\boot\writer\nand\src

    IF you want to use NAND from your application, you can choose to initialize the SOC using board library and use platform library only for accessing NAND or the other option is to use BOARD library and CSL-FL for EMIF16 by extracting that code from the platform library.

    Regards,
    Rahul
  • Hi Rahul

    Thank you very much for the information. I suspected that this was the case.

    Is TI planning on implementing a LLD for the EMIF16 bus at a later date?

    Sean

  • Sean,

    Currently there is no plan to support full fledged LLD for EMIF16 bus as the IP will no longer be supported on newer devices. We do support a function CSL for this IP that you can use. For the newer devices, we plan to support GPMC IP as the default parallel port to interface with async memory.

    EMIF16 as an IP has limitations like it is compatible only with ONFI 1.0 standard and can support only upto 4 bit ECC. this doesn`t work well with the rapidly changing raw NAND market place so we are upgrading to GPMC with ELM based ECC mechanism. EMIF16 though is quite mature and has been used for several years for interfacing with not just parallel NOR and NAND but also with external FPGA and there are no known drawbacks other than for interfacing with NAND.

    Regards,
    Rahul