Part Number: AM4377
Hi Team,
As per AM4377 TRM, RMII Reference clock is input to Processor (ETH1_CLK/ETH2_CLK in schematics). But even though we have configured it as input, we are seeing 50MHz output from this pin. So we have isolated the Oscillator and Processor currently.
Attached Ethernet Switch RMII Clock block diagram from processor reference manual. As per our understanding, we can use this RMIIx_REFCLK as both input or output. If we are using this as input, then we have to disable pd_per_cpsw_50mhz_gclk and use external clock source for the input. If we are using this as output, then we have to enable pd_per_cpsw_50mhz_gclk and we can give this clock to PHY chip as well. Is my understanding correct?
Best Regards,
Madhusoodana Bairy
