TMS320C6678: Problem EMIF16 interface with FPGA

Hello!

In the starting post of the topic the most notable difference was in behaviour of CS vs WE signals. That's just the sign something was different in access.

As loop with 16-bit writes was fine, I think the true reason might be in implementation of memcpy() function. I found something I think might be relevant at TI\ccsv8\tools\compiler\c6000_7.4.24\lib\src\memcpy64.asm :

;*****************************************************************************/
;*
;* void *memcpy(void *restrict dst, const void *restrict src, unsigned int len)
;* {
;*   char *restrict s_p  = (char *)src;
;*   char *restrict d_p  = (char *)dst;
;*   int   loop          = len >> 3;
;*   int   i;
;*
;*   if (len & 1)      *d_p++ = *s_p++;
;*   if (len & 2)    { *d_p++ = *s_p++; *d_p++ = *s_p++; }
;*   if (len & 4)    { _mem4(d_p)  = _mem4(s_p);  d_p += 4; s_p += 4; }  
;*   if (loop == 1)   _memd8(d_p) = _memd8(s_p);   
;*
;*   if (loop >= 2)
;*       for (i = 0; i < loop; i++, d_p += 8, s_p += 8)
;*          _memd8(d_p) = _memd8(s_p);
;*
;*   return dst;
;* }
;*
;*****************************************************************************

If I got it right, they try to copy 1, then 2, then 4 bytes until remaining count gets multiple of 8 and then proceed with 8 byte copying. So I suspect, when your word count is odd, or, equivalently, your byte count is even, then following line is executed:

if (len & 2)    { *d_p++ = *s_p++; *d_p++ = *s_p++; }

This makes two byte accesses, which you observe as high and low bytes of the first word were sent separately.

For me, I am surprised memcpy() implementation attempts to adjust counter at the beginning and proceed with unaligned _memd8 instead of search for aligned boundary. But either way, you'd better keep away of using memcpy() to serve your peripheral.

In your position I would not disregard for loop in favour of memcpy. With alignment that could probably result in very efficient implementation.

Hope this helps.