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RTOS/AM5716: DDR3 configuration for IDK

Patrick Ruf
Genius 5095 points

Part Number: AM5716

Tool/software: TI-RTOS

Hi,

I try to figure out what the correct EMIF DDR register configuration for the AM571x IDK Evaluation Module are.
Is there an "AM571x EMIF Tool" file for the AM571x IDK?

What is the DDR frequency used for the AM571x IDK sample code?

So far I have the following register values:

EMIF_SDRAM_TIMING_1: 0xD113781C
EMIF_SDRAM_TIMING_2 0x30B37FE3
EMIF_SDRAM_TIMING_3 0x409F8AD8
EMIF_SDRAM_REFRESH_CONTROL 0x0000144A
EMIF_SDRAM_CONFIG 0x61862B32

I'm a bit in doubt if those values match with the populated DDR3L devices on the AM571x IDK (MT41K256M16HA-125) (?)

Thanks and best regards,

Patrick


  • 0
    TI__Guru**** 393215 points
    The RTOS team have been notified. They will respond here.
  • 0 in reply to Biser Gatchev-XID
    Genius 5095 points

    Hi,

    Meanwhile I have more information on this topic. As I have not seen that MDLL clock is half the rate of PHY I used the wrong clock (333.33MHz instead of 666.66MHz).
    So some values are now fine. But still some values do not match. The picture below shows the values that lead to the register values used in the file "AM571x_ddr_config.gel".
    But the values for "tRP", "tRCD", "tRRD" and "tFAW" do not match with the values from the "MT41K256M16HA-125" datasheet.
    As of my understanding the values should be:
    - tRP=13.75ns
    - tRCD=13.75ns
    - tRRD=4CK or 7.5ns
    - tFAW=40ns

    With those values from the datasheet the "Final bit field values" would match with the "JEDEC bit field values".


    Any clarification would help.

    Thanks and best regards,
    Patrick



  • 0 in reply to Patrick Ruf
    TI__Guru**** 393215 points
    Why have you entered 13ns instead of 13.75ns for tRP and tRCD? As for tRRD, it should be "greater of 4CK or 7.5ns", in this case 7.5ns is greater than 4*1.5ns=6ns, so tRRD should be 7.5ns.
  • 0 in reply to Biser Gatchev-XID
    Genius 5095 points
    Biser,

    I have entered for example 13ns for tRP to get the register values used in the TI gel files and the board support packages for the AM571x IDK Evaluation board. For me this values are wrong. For tRP it should be 13.75ns.
    That is exactly my question. Why is TI using values that, in my opinion, do not match with the DDR3L datasheet.

    Regards,
    Patrick
  • 0 in reply to Patrick Ruf
    TI__Genius 9655 points
    Patrick

    Could you help point to the GEL files you are using?

    Looking at the above registers and the capability of AM571x, the DDR clock should be set to 666MHz. For the TI GEL file settings, the DDR speed grade selected is DDR3-1333 and the parameters are set for that speed grade since the DDR interface is only running at 666 MHz clock (DDR3-1333) even though the memory part is capable of running at a DDR clock of 800 MHz (DDR3-1600)

    Please verify if this resolves the discrepancy you noted.

    Regards, Siva
  • 0 in reply to sivak
    Genius 5095 points

    Siva,

    The GEL file is attached.

    In the GEL file I can see that the register "EMIF_SDRAM_TIMING_1" is set to a value "0xD113781C".

    This means that the parameters are set as follows:
    tRP=8
    tRCD=8
    tRRD=3

    But for the populated DDR3L SDRAM "MT41K256M16HA-125" those parameters should be set as follows (for DDR3 frequency of 666.66MHz):
    tRP=9
    tRCD=9
    tRRD=6

    Because minimal values from DDR3 SDRAM "MT41K256M16HA-125" (DDR3L-1600 Speed Bins) datasheet are:
    tRP=13.75ns
    tRCD=13.75ns
    tRRD=4CK or 7.5ns
    tFAW=40ns

    And this leads into a "EMIF_SDRAM_TIMING_1" register value of: 0xD3337834

    Regards,
    Patrick


    AM571x_ddr_config.gel

    MT41K256M16 MT41K512M8 MT41K1G4 (4Gb DDR3L SDRAM).pdf

  • 0 in reply to Patrick Ruf
    TI__Genius 9655 points
    Patrick

    As I pointed out earlier, the speed bin table used is DDR3-1333 for deriving the timing values. Even though the part is capable of running at DDR3-1600, the memory parts per JEDEC are required to also run at the lower speed bins.

    Given this, the values to be used should be for DDR3-1333, tCK = 1.5ns

    tRP = 13.5ns (9 tCK)
    tRCD = 13.5ns (9tCK)
    tRRD = greater of 4 tCK or 6ns (4 tCK)

    The actual values programmed should -1 of the desired value - please see the TRM description in Table 15-146 which explains this requirement.

    Therefore, the values programmed should be:

    tRP = 8 tCK (9-1)
    tRCD = 8 tCK (9-1)
    tRRD = 3 tCK (3-1)

    which perfectly aligns with what you have noted above.

    Regards, Siva
  • 0 in reply to sivak
    Genius 5095 points

    Siva,

    If those values are right, why do they not correspond to the values in the "JEDEC Bit Field Values" (given the populated DDR3 RAM with the used frequency)?
    Why are those values with a yellow background in the EMIF Tool (Warning)?

    Is this a EMIF Tool issue?

    Regards,
    Patrick

  • 0 in reply to Patrick Ruf
    TI__Genius 9655 points
    Patrick

    The speed bin table (referenced as in JEDEC spec) is referenced from the selection made in Step 1: Sytem Details tab, Detail #15. If you select DDR3-1333 and use the DDR memory timing information from the corresponding DDR3-1333 speed bin tables, there should not be any errors. Essentially, the user selection in Step1 - System Details and the user input values in Step 3- DDR timing should correspond to the same speed bin tables. If not, the tool will provide the warnings in case the min. timings are violated.

    If you still have questions, attach a spread sheet that matches your configuration and highlight the specific concerns you have

    Regards, Siva
  • 0 in reply to sivak
    Genius 5095 points
    Siva,

    That means that if I use a DDR3-1866 (MT41K256M16TW-107) and clock it with 666.66MHz and therefore use it as a DDR3-1333 (CL=9, CWL=7) I have to set 1333 under "DDR memory specifications" (instead of 1866)? Means that I have to use all the values from DDR3-1333 Speed Bin device?
    So that leads to my first question: Do you have a EMIF Tool configuration file for the AM571x IDK? That would probably make things much clearer.

    Regards,
    Patrick
  • 0 in reply to Patrick Ruf
    TI__Genius 9655 points
    Patrick

    Yes. Your understanding is correct.

    I don't know if we have a copy of the EMIF tool configuration for the IDK. If you have a specific concern w.r.t. your board, I think it would be helpful to review that per the recommendation provided.

    Regards, Siva