AM4378: eMMC not found in U-boot

Luke McKnew

Part Number: AM4378

My company has designed a custom board based heavily on the AM437x Starter Kit. We have added an eMMC chip to the MMC1 port on the bootable pins (selected from the TRM to ensure bootability) and removed the conflicting connections from the starter kit on those lines. The sysboot configurations are setup for MMC0->MMC1->USB1->USB0 with a uSD card connected to MMC0 the same way as in the starter kit. Our customized device tree file is working for the kernel (version from tisdk 5.0.0.15) and once we're in the Linux environment when booting from the uSD card the eMMC is enumerated as mmcblk1 and is fully accessible.

The issue is that I cannot seem to make the eMMC on MMC1 visible in the u-boot environment or from SPL. Since the MMC1 bus is working in the LInux environment I know the device tree is setup correctly in the Linux environment but when I try to point to that device tree to compile MLO and u-boot the SPL stage doesn't boot at all (nothing prints on power-up or system reset).

When the u-boot environment starts from the uSD card (using the default 'am437x-gp-evm' dtb file for compilation) it prints out the only found MMC device is MMC0 and when I execute "mmc dev 1" it reports nothing found. Here is the a copy of the terminal behavior from powering on the board with a uSD in the socket.

U-Boot SPL 2018.01-00228-g555fffa9f6-dirty (Sep 26 2018 - 11:35:14)
Trying to boot from MMC1
SPL: Please implement spl_start_uboot() for your board
SPL: Direct Linux boot not active!
reading u-boot.img
reading u-boot.img
reading u-boot.img
reading u-boot.img


U-Boot 2018.01-00228-g555fffa9f6-dirty (Sep 26 2018 - 11:35:14 -0400)

CPU  : AM437X-GP rev 1.2
Model: TI AM437x SK EVM
DRAM:  1 GiB
PMIC:  TPS65218
NAND:  0 MiB
MMC:   OMAP SD/MMC: 0
*** Warning - bad CRC, using default environment

Net:   <ethaddr> not set. Validating first E-fuse MAC
cpsw, usb_ether
Hit any key to stop autoboot:  0
=> mmc list
OMAP SD/MMC: 0 (SD)
=> mmc rescan
=> mmc list
OMAP SD/MMC: 0 (SD)
=> mmc dev 1
MMC Device 1 not found
no mmc device at slot 1

I reached my current point after formatting the eMMC within the Linux environment to be basically a copy of the uSD card. I created 2 partitions with start and stop sectors and fs types/bootable property that matched the card. Then I copied the boot partition contents from the uSD to the eMMC. I was also able to extract a fs image to the linux partition of the eMMC. With a known working MLO file on the eMMC's boot partion, trying to boot without the uSD card inserted results in this printout:

U-Boot SPL 2018.01-00228-g555fffa9f6-dirty (Sep 26 2018 - 12:10:32)
Trying to boot from MMC2
spl: could not find mmc device. error: -19
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

I believe this indicates that I just need to create a working device tree for u-boot or SPL to use, that instantiates the MMC1 bus but I can't figure out why using my dts file that works under Linux breaks the hardware boot stage.

It is basically the opposite problem from this e2e thread except that our design has the uSD card on MMC0 and the eMMC on MMC1:

over 6 years ago

0 Luke McKnew over 6 years ago

Prodigy 130 points

Additionally, I've tried the method called for in the following thread for adding MMC1 to the spl pin mux but it didn't fix the problem.
e2e.ti.com/.../387980

0 Marcus Cooksey over 6 years ago in reply to Luke McKnew

TI__Genius 9510 points

Please allow us to investigate to replicate on our AM43 and follow up with you.

0 Marcus Cooksey over 6 years ago in reply to Marcus Cooksey

TI__Genius 9510 points

The problem could be the SPL is only selecting MMC0 partition 1 as the only MMC device to probe and initialize.
You can set MMC1 as the default by changing CONFIG_ENV_FAT_DEVICE_AND_PART "0:1" to "1:1" in file <u-boot>/spl/u-boot.cfg

0 Luke McKnew over 6 years ago in reply to Marcus Cooksey

Prodigy 130 points

Thanks for the response Marcus,

It appears you are correct about the SPL only selecting the MMC0p1 to probe. I've used an oscilloscope to monitor the clock signal on MMC1 and it's not operated until the kernel is booting.

I did make some progress while you were starting to investigate. We used the same EEPROM setup as the starterkit and loaded the headers to make the u-boot environment think our board is a starterkit (a temporary development stage). This means that once u-boot starts it loads the am437x-sk-evm.dtb file instead of the default am437x-gp-evm.dtb. Once I verified the file that was being used I was able to add the pinmux definition for the MMC1 port to the am437x-sk-evm.dts file and within the u-boot environment that started from the uSD I can see both mmc devices. I think that solves the u-boot half of the issue.

For full clarity, when I compile the new MLO and u-boot.img file my process has been to execute the following commands. To test modifying the CONFIG_ENV_FAT_DEVICE_AND_PART parameter I executed all 3 lines after modifying the u-boot.cfg file as well as executing only the last line after modifying the u-boot.cfg file. If I execute all 3 lines all the u-boot.cfg files are overwritten, but if I make the change between the defconfig and the final line the change sticks through a compile.

make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- distclean
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- am43xx_evm_defconfig
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-

I was able to test your solution but it didn't fix the problem. MLO configured with 'CONFIG_ENV_FAT_DEVICE_AND_PART "1:1"' running on the eMMC still outputs:

U-Boot SPL 2018.01-00228-g555fffa9f6-dirty (Sep 28 2018 - 15:39:39)
Trying to boot from MMC2
spl: could not find mmc device. error: -19
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

0 Marcus Cooksey over 6 years ago in reply to Luke McKnew

TI__Genius 9510 points

It seems the SPL is attempting to boot from MMC2 and not MMC1 -->"Trying to boot from MMC2"

0 Luke McKnew over 6 years ago in reply to Marcus Cooksey

Prodigy 130 points

That is correct behavior, the dtb files enumerate the mmc ports starting from 1 while the hardware is enumerated starting at 0. If you notice in my first post the working snippet shows 'Trying to boot from MMC1' when it works, which is the system operating from hardware port mmc0 or the uSD slot. In the working device tree I had to define the eMMC as 'mmc2'. However in the <u-boot>/board/ti/am43xx/mux.c file the pinmux ports are defined like the hardware (notice the standard file defines mmc0).

0 Marcus Cooksey over 6 years ago in reply to Luke McKnew

TI__Genius 9510 points

Ok but with the pinmux settings you can boot from MMC1?

0 Luke McKnew over 6 years ago in reply to Marcus Cooksey

Prodigy 130 points

We’re booting from the uSD card. It’s connected to the mmc0 hardware port which is the mmc1 port in the device tree and in the MLO initial printout. We cannot boot from the eMMC chip which is connected to the mmc1 hardware port which is the mmc2 port in the device tree and in the MLO initial printout. Today I was able to get the u-boot environment to recognize the eMMC port but I still can’t boot from that device.

0 Luke McKnew over 6 years ago in reply to Luke McKnew

Prodigy 130 points

To add just a bit more info. Once I got the eMMC partitioned correctly and loaded a valid MLO file the hardware is successfully stepping through the boot sequence by checking MMC0 and moving to MMC1, finding the boot partition and MLO file and executing the MLO. The issue I'm trying to have resolved is how to make the MLO environment recognize the MMC1 hardware port. There are no dts files in this environment and adding the interface to <u-boot>/board/ti/am43xx/mux.c does not fix the problem.

0 Marcus Cooksey over 6 years ago in reply to Luke McKnew

TI__Genius 9510 points

It may be necessary to add a uEnv.txt file on the same partition as the MLO file on MMC1 port and define all the necessary environment variables. The environment variable definition will be similar to settings from uSD.

See the following document for more information on the uEnv.txt file.

processors.wiki.ti.com/.../AM335x_U-Boot_User's_Guide

0 Luke McKnew over 6 years ago in reply to Marcus Cooksey

Prodigy 130 points

I have included a uEnv.txt file in the boot partition. We were actually using the uEnv.txt method to specify our board's .dtb file. I've successfully been able to start in the uSD and boot the file system and the kernel from the eMMC using the 'bootpart' value but this doesn't address the issue we're having. The problem is that this file isn't accessed by the processor until the full u-boot environment is entered. Our problem is that the SPL environment can't see the mmc1 hardware port to get u-boot.img and launch into the u-boot environment.

My understanding is that the boot process involves 4 steps.
1) First the processor is hard coded to reach out on ports specified in the Sysboot pin settings. (MMC0, MMC1, USB1, USB0 in our instance)
2)Then if the hardware finds the file MLO it launches the SPL environment. (Within which my system cannot see the mmc1 port). This environment interrogates the same partition looking for u-boot.img. If found it loads the image and moves on to step 3.
3)u-boot.img is running, which uses uEnv.txt and interrogates the other partition seeking a file system to launch. If found it copies the necessary code to ram and starts kicks off the Kernel boot.
4)Kernel boot and linux environment, once the kernel boot is complete the system is in linux mode.

I've already vetted that steps 1, 3 and 4 are working correctly with both mmc ports. I just need to know how to make the SPL environment aware that there is a chip on MMC1(hardware) that it can reach out to, or that the port even exists as I haven't been able to display any status showing it's aware of the port. I've found other E2E posts (linked above) that mention making changes in <u-boot>/board/ti/am43xx/mux.c but no changes I make there seem to be effecting the system. I've added multiple printf statements in mux.c as well as <u-boot>/board/ti/am43xx/board.c in functions that appear necessary but nothing comes out, whether DEBUG is defined or not. Since I can't tell which source files are used to generate MLO I don't know where I should be setting up the mmc1 pin interface.

0 Marcus Cooksey over 6 years ago in reply to Luke McKnew

TI__Genius 9510 points

2)Then if the hardware finds the file MLO it launches the SPL environment. <- At this stage you know the SPL environment has started i.e. SPL banner is printed? However the problems is the mmc1 port is not found, correct?

0 Luke McKnew over 6 years ago in reply to Marcus Cooksey

Prodigy 130 points

Yes that is the problem. Within the MLO/SPL environment the system seems to be unaware of the eMMC chip sitting on the mmc1 port. I can't tell where to add this interface in an MLO pinmux file or thru configurations. Editing the files under <u-boot>/board/ti/am43xx/ doesn't lead to any discernible change in behavior.

0 Marcus Cooksey over 6 years ago in reply to Luke McKnew

TI__Genius 9510 points

The MLO will use the dtb to determine the MMC pinmux configuration. Could you please provide the dts and <u-boot>/spl/u-boot.cfg files you're using? It may be necessary to have a dts primarily for the MLO that only defines the MMC1 (eMMC) configuration and one for u-boot that defines both MMC0 (SD) and MMC1.

Also - Open file spl/u-boot-spl.dtb and check the mmc instance address (it should be mmc@481D8000)

0 Luke McKnew over 6 years ago in reply to Marcus Cooksey

Prodigy 130 points

I can only assume the dtb file your are reffering to is the compiled dts file am437x-sk-evm.dts which the full u-boot environment uses after interrogating the EEPROM, but it isn't clear to me which file MLO is using as a dtb. I've attached /spl/u-boot.cfg and that file respectivelty:

Fullscreen u-boot.cfg.txt Download

#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FIT_SOURCE ""
#define CONFIG_SYS_PL310_BASE 0x48242000
#define CONFIG_CMD_FAT 1
#define CONFIG_SPL_DM_SERIAL 1
#define CONFIG_BOOTM_NETBSD 1
#define CONFIG_OF_SPL_REMOVE_PROPS "pinctrl-0 pinctrl-names clocks clock-names interrupt-parent"
#define CONFIG_CMD_FDT 1
#define CONFIG_NAND_OMAP_GPMC 1
#define CONFIG_USB_GADGET_DOWNLOAD 1
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000
#define CONFIG_CMD_ITEST 1
#define CONFIG_BOOTM_VXWORKS 1
#define CONFIG_CMD_EDITENV 1
#define CONFIG_NAND_OMAP_ELM 1
#define CONFIG_CMD_MTDPARTS 1
#define CONFIG_TI_SPI_MMAP 
#define CONFIG_SPL_NAND_SUPPORT 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_CMD_PART 1
#define CONFIG_SPL_LOGLEVEL 4
#define CONFIG_SPL_USE_ARCH_MEMSET 1
#define CONFIG_HAS_VBAR 1
#define CONFIG_CMD_ENV_EXISTS 1
#define CONFIG_VERSION_VARIABLE 1
#define CONFIG_CMD_CRC32 1
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
#define CONFIG_SYS_LONGHELP 
#define CONFIG_SYS_MPUCLK 500
#define CONFIG_SYS_NAND_5_ADDR_CYCLE 
#define CONFIG_SPL_NET_SUPPORT 1
#define CONFIG_IS_MODULE(option) config_enabled(CONFIG_VAL(option ##_MODULE))
#define CONFIG_SYS_LOAD_ADDR 0x82000000
#define CONFIG_HASH 1
#define CONFIG_USE_ARCH_MEMSET 1
#define CONFIG_DISPLAY_BOARDINFO 1
#define CONFIG_CMD_XIMG 1
#define CONFIG_EXPERT 1
#define CONFIG_CMDLINE 1
#define CONFIG_BOOTDELAY 2
#define CONFIG_SYS_NAND_BASE 0x8000000
#define CONFIG_CMD_BOOTEFI 1
#define CONFIG_ARCH_OMAP2PLUS 1
#define CONFIG_SPI_FLASH 1
#define CONFIG_BOOTP_BOOTPATH 
#define CONFIG_SYS_HELP_CMD_WIDTH 8
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_POWER_TPS62362 
#define CONFIG_EFI_PARTITION 1
#define CONFIG_SPL_SEPARATE_BSS 1
#define CONFIG_FS_FAT 1
#define CONFIG_BOOTM_RTEMS 1
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_ISW_ENTRY_ADDR 0x402F4000
#define CONFIG_SYS_NAND_ONFI_DETECTION 
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_8M
#define CONFIG_MD5 1
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
#define CONFIG_BOOTM_LINUX 1
#define CONFIG_DEFAULT_FDT_FILE ""
#define CONFIG_BOARD_LATE_INIT 1
#define CONFIG_CREATE_ARCH_SYMLINK 1
#define CONFIG_CMD_CONSOLE 1
#define CONFIG_SUPPORT_OF_CONTROL 1
#define CONFIG_SYS_CPU "armv7"
#define CONFIG_SPL_BOARD_INIT 1
#define CONFIG_SPL_STACK_R_ADDR 0x82000000
#define CONFIG_BOOTP_PXE_CLIENTARCH 0x15
#define CONFIG_SPL_YMODEM_SUPPORT 1
#define CONFIG_BOOTP_GATEWAY 
#define CONFIG_SYS_THUMB_BUILD 1
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_MMC 1
#define CONFIG_SPL_OF_CONTROL 1
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20))
#define CONFIG_SPL_OS_BOOT 1
#define CONFIG_SMBIOS_PRODUCT_NAME "am43xx"
#define CONFIG_CMD_MISC 1
#define CONFIG_FIT 1
#define CONFIG_USB_DWC3 1
#define CONFIG_TI_I2C_BOARD_DETECT 1
#define CONFIG_SPL_LIBCOMMON_SUPPORT 1
#define CONFIG_PHY_GIGE 1
#define CONFIG_DM_DEVICE_REMOVE 1
#define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024)
#define CONFIG_MMC_WRITE 1
#define CONFIG_QSPI_SEL_GPIO 48
#define CONFIG_ENV_OVERWRITE 
#define CONFIG_CMD_NET 1
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_CMD_NFS 1
#define CONFIG_SPL_SYS_THUMB_BUILD 1
#define CONFIG_DFU_SF 1
#define CONFIG_ENV_SIZE (64 << 10)
#define CONFIG_USB_XHCI_DWC3 1
#define CONFIG_SUPPORT_RAW_INITRD 
#define CONFIG_NAND_OMAP_GPMC_PREFETCH 1
#define CONFIG_CMD_FS_GENERIC 1
#define CONFIG_CMD_PING 1
#define CONFIG_SYS_L2_PL310 
#define CONFIG_SPL_BUILD 1
#define CONFIG_SYS_MALLOC_LEN SZ_32M
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:00"
#define CONFIG_INITRD_TAG 
#define CONFIG_SYS_NAND_ECCBYTES 26
#define CONFIG_SPL_LIBDISK_SUPPORT 1
#define CONFIG_LOCALVERSION ""
#define CONFIG_EEPROM_CHIP_ADDRESS 0x50
#define CONFIG_SYS_TEXT_BASE 0x80800000
#define CONFIG_CC_OPTIMIZE_FOR_SIZE 1
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 1
#define CONFIG_SYS_DEF_EEPROM_ADDR 0
#define CONFIG_REGEX 1
#define CONFIG_EFI_PARTITION_ENTRIES_NUMBERS 128
#define CONFIG_SYS_CONFIG_NAME "am43xx_evm"
#define CONFIG_SPL_SYS_MALLOC_SIMPLE 1
#define CONFIG_SYS_NAND_OOBSIZE 224
#define CONFIG_BOOTSTAGE_RECORD_COUNT 30
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
#define CONFIG_CMD_SAVEENV 1
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500
#define CONFIG_MKIMAGE_DTC_PATH "dtc"
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_BOOTM_PLAN9 1
#define CONFIG_IS_BUILTIN(option) config_enabled(CONFIG_VAL(option))
#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR
#define CONFIG_SPL_DM_MMC 1
#define CONFIG_SERIAL_PRESENT 1
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN 0x100000
#define CONFIG_DM_MMC 1
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
#define CONFIG_SPL_NAND_DRIVERS 
#define CONFIG_TARGET_AM43XX_EVM 1
#define CONFIG_SPI_FLASH_BAR 1
#define CONFIG_CMD_NAND 1
#define CONFIG_SPL_EFI_PARTITION 1
#define CONFIG_FIT_ENABLE_SHA256_SUPPORT 1
#define CONFIG_OF_LIST "am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
#define CONFIG_CMD_GPT 1
#define CONFIG_TPL_SYS_MALLOC_F_LEN 0x2000
#define CONFIG_PUB_ROM_DATA_SIZE 0x8400
#define CONFIG_USB_DWC3_PHY_OMAP 1
#define CONFIG_USB_ETHER 1
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, }
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_DM_DEV_READ_INLINE 1
#define CONFIG_POWER_I2C 
#define CONFIG_BOOTP_DNS 
#define CONFIG_SYS_CACHE_SHIFT_6 1
#define CONFIG_CMD_MEMORY 1
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000
#define CONFIG_MMC_HW_PARTITIONING 1
#define CONFIG_SPL_MTD_SUPPORT 1
#define CONFIG_SUPPORT_SPL 1
#define CONFIG_CMD_RUN 1
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_ENV_VARS_UBOOT_CONFIG 
#define CONFIG_DM_SPI_FLASH 1
#define CONFIG_USB 1
#define CONFIG_BOOTP_HOSTNAME 
#define CONFIG_BOARDDIR board/ti/am43xx
#define CONFIG_CMD_SPL_WRITE_SIZE 0x40000
#define CONFIG_POWER 
#define CONFIG_SPL_LEGACY_IMAGE_SUPPORT 1
#define CONFIG_SPL_BOOTSTAGE_RECORD_COUNT 5
#define CONFIG_NET 1
#define CONFIG_CPU_V7 1
#define CONFIG_SPL_NAND_AM33XX_BCH 1
#define CONFIG_OF_LIBFDT 1
#define CONFIG_USB_DWC3_GADGET 1
#define CONFIG_SYS_MAX_FLASH_SECT 512
#define CONFIG_PHYLIB 1
#define CONFIG_GENERATE_SMBIOS_TABLE 1
#define CONFIG_CMDLINE_EDITING 
#define CONFIG_CMD_USB 1
#define CONFIG_DM_SERIAL 1
#define CONFIG_CMD_EXT2 1
#define CONFIG_CMD_EXT4 1
#define CONFIG_TI_EDMA3 
#define CONFIG_QSPI_QUAD_SUPPORT 
#define CONFIG_ARCH_FIXUP_FDT_MEMORY 1
#define CONFIG_USB_GADGET_VENDOR_NUM 0x0403
#define CONFIG_SPL_SIMPLE_BUS 1
#define CONFIG_SPL_I2C_SUPPORT 1
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21)
#define CONFIG_SPL_NAND_BASE 
#define CONFIG_USB_XHCI_HCD 1
#define CONFIG_ISO_PARTITION 1
#define CONFIG_SYS_MALLOC_CLEAR_ON_INIT 1
#define CONFIG_CMD_EEPROM 1
#define CONFIG_SYS_EXTRA_OPTIONS "CONS_INDEX=1"
#define CONFIG_CMD_DFU 1
#define CONFIG_EEPROM_BUS_ADDRESS 0
#define CONFIG_CMD_SPL_NAND_OFS 0x00100000
#define CONFIG_SPL_GPIO_SUPPORT 1
#define CONFIG_CMD_BOOTEFI_HELLO_COMPILE 1
#define CONFIG_HUSH_PARSER 1
#define CONFIG_CMD_DM 1
#define CONFIG_BOOTP_VCI_STRING "U-Boot.armv7"
#define CONFIG_DM 1
#define CONFIG_ZLIB 1
#define CONFIG_USB_GADGET_DUALSPEED 1
#define CONFIG_LIB_UUID 
#define CONFIG_SYS_I2C_OMAP24XX 1
#define CONFIG_CMD_GO 1
#define CONFIG_USB_HOST 1
#define CONFIG_CMD_BOOTD 1
#define CONFIG_CMD_BOOTM 1
#define CONFIG_CMD_BOOTZ 1
#define CONFIG_SYS_NS16550 1
#define CONFIG_SYS_MALLOC_F 1
#define CONFIG_SYS_RX_ETH_BUFFER 64
#define CONFIG_AUTO_COMPLETE 
#define CONFIG_SPI_FLASH_USE_4K_SECTORS 1
#define CONFIG_OMAP_TIMER 1
#define CONFIG_SYS_SOC "am33xx"
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_MALLOC_F_LEN 0x2000
#define CONFIG_SYS_NS16550_CLK 48000000
#define CONFIG_DOS_PARTITION 1
#define CONFIG_GZIP 1
#define CONFIG_SYS_VENDOR "ti"
#define CONFIG_DFU_MMC 1
#define CONFIG_MMC_OMAP_HS 1
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200
#define CONFIG_USB_FUNCTION_DFU 1
#define CONFIG_CMD_SF 1
#define CONFIG_REQUIRE_SERIAL_CONSOLE 1
#define CONFIG_CMD_FPGA 1
#define CONFIG_IDENT_STRING ""
#define CONFIG_ENV_IS_IN_FAT 1
#define CONFIG_MTDIDS_DEFAULT "nand0=nand.0"
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SYS_NS16550_COM1 0x44e09000
#define CONFIG_ENV_FAT_DEVICE_AND_PART "0:1"
#define CONFIG_SPL_ETH_SUPPORT 1
#define CONFIG_SPL_FIT 1
#define CONFIG_VAL(option) config_val(option)
#define CONFIG_SPL_LIBGENERIC_SUPPORT 1
#define CONFIG_LOCALVERSION_AUTO 1
#define CONFIG_TI_QSPI 1
#define CONFIG_SPL_MMC_SUPPORT 1
#define CONFIG_AM43XX 1
#define CONFIG_ENV_FAT_INTERFACE "mmc"
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_DRIVER_TI_CPSW 
#define CONFIG_IMAGE_FORMAT_LEGACY 
#define CONFIG_SYS_BOOT_RAMDISK_HIGH 
#define CONFIG_MMC_VERBOSE 1
#define CONFIG_NET_TFTP_VARS 1
#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_USE_PRIVATE_LIBGCC 1
#define CONFIG_CMD_SPI 1
#define CONFIG_CMD_SPL 1
#define CONFIG_CMD_DHCP 1
#define CONFIG_SPL_SERIAL_SUPPORT 1
#define CONFIG_ENV_FAT_FILE "uboot.env"
#define CONFIG_CMD_ECHO 1
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + CONFIG_SPL_BSS_MAX_SIZE)
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_USB_DWC3_OMAP 1
#define CONFIG_FAT_WRITE 1
#define CONFIG_SYS_TIMERBASE 0x48040000
#define CONFIG_SPL_WATCHDOG_SUPPORT 1
#define CONFIG_CMD_TIME 1
#define CONFIG_USE_ARCH_MEMCPY 1
#define CONFIG_SYS_I2C 
#define CONFIG_SPL_FIT_GENERATOR ""
#define CONFIG_SPL_DM 1
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
#define CONFIG_SPL_ISO_PARTITION 1
#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
#define CONFIG_OF_CONTROL 1
#define CONFIG_EFI_PARTITION_ENTRIES_OFF 0
#define CONFIG_BOOTP_PXE 
#define CONFIG_HAS_THUMB2 1
#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_ARCH "arm"
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
#define CONFIG_CMD_ASKENV 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_SPL_PARTITION_UUIDS 1
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_BOARD "am43xx"
#define CONFIG_PARTITION_UUIDS 1
#define CONFIG_TI_COMMON_CMD_OPTIONS 1
#define CONFIG_DM_GPIO 1
#define CONFIG_MTDPARTS_DEFAULT "mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)"
#define CONFIG_SYS_PTV 2
#define CONFIG_SPL_NAND_ECC 
#define CONFIG_DTC 1
#define CONFIG_CMDLINE_TAG 
#define CONFIG_SYS_ARM_ARCH 7
#define CONFIG_SPL_USE_ARCH_MEMCPY 1
#define CONFIG_BOOTSTAGE_STASH_SIZE 0x1000
#define CONFIG_OF_LIBFDT_OVERLAY 1
#define CONFIG_ENV_EEPROM_IS_ON_I2C 
#define CONFIG_CMD_IMPORTENV 1
#define CONFIG_MMC_QUIRKS 1
#define CONFIG_HAVE_PRIVATE_LIBGCC 1
#define CONFIG_CMD_EXPORTENV 1
#define CONFIG_PARTITIONS 1
#define CONFIG_SPL_DOS_PARTITION 1
#define CONFIG_OMAP_GPIO 1
#define CONFIG_OF_TRANSLATE 1
#define CONFIG_SPL_STACK_R 1
#define CONFIG_CMD_I2C 1
#define CONFIG_ARCH_CPU_INIT 
#define CONFIG_SPL_NET_VCI_STRING "AM43xx U-Boot SPL"
#define CONFIG_CMD_ELF 1
#define CONFIG_SYS_NAND_PAGE_SIZE 4096
#define CONFIG_EFI_LOADER 1
#define CONFIG_SMBIOS_MANUFACTURER "ti"
#define CONFIG_RANDOM_UUID 1
#define CONFIG_NAND 1
#define CONFIG_DM_SEQ_ALIAS 1
#define CONFIG_FS_EXT4 
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_FRAMEWORK 
#define CONFIG_BOOTSTAGE_STASH_ADDR 0x0
#define CONFIG_USB_ETH_RNDIS 1
#define CONFIG_SPI 
#define CONFIG_SPL 1
#define CONFIG_MTD_DEVICE 
#define CONFIG_SPL_ENV_SUPPORT 1
#define CONFIG_CMD_SOURCE 1
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_USB_STORAGE 1
#define CONFIG_SPI_FLASH_MACRONIX 1
#define CONFIG_DISPLAY_CPUINFO 1
#define CONFIG_LOGLEVEL 4
#define CONFIG_SHA1 1
#define CONFIG_SETUP_MEMORY_TAGS 
#define CONFIG_DFU_RAM 1
#define CONFIG_EXT4_WRITE 
#define CONFIG_SPL_FAT_SUPPORT 1
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SPL_SYS_MALLOC_F_LEN 0x2000
#define CONFIG_CMD_LOADB 1
#define CONFIG_CMD_LOADS 1
#define CONFIG_FS_FAT_MAX_CLUSTSIZE 65536
#define CONFIG_CMD_IMI 1
#define CONFIG_CMD_EXT4_WRITE 1
#define CONFIG_SF_DEFAULT_SPEED 48000000
#define CONFIG_SPL_USBETH_SUPPORT 1
#define CONFIG_CONS_INDEX 1
#define CONFIG_POWER_TPS65218 
#define CONFIG_LMB 
#define CONFIG_AUTOBOOT 1
#define CONFIG_ARM 1
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SPL_USB_GADGET_SUPPORT 1
#define CONFIG_IS_ENABLED(option) (config_enabled(CONFIG_VAL(option)) || config_enabled(CONFIG_VAL(option ##_MODULE)))
#define CONFIG_OF_SEPARATE 1
#define CONFIG_CMD_GPIO 1
#define CONFIG_CMD_BDI 1
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1700
#define CONFIG_SHA256 1
#define CONFIG_BOOTP_SUBNETMASK 
#define CONFIG_SPL_OF_TRANSLATE 1
#define CONFIG_NETDEVICES 1
#define CONFIG_DEFAULT_DEVICE_TREE "am437x-gp-evm"
#define CONFIG_USBNET_DEVADDR "de:ad:be:ef:00:01"
#define CONFIG_SPL_RAW_IMAGE_SUPPORT 1
#define CONFIG_USB_GADGET_MANUFACTURER "Texas Instruments"
#define CONFIG_CMD_MII 1
#define CONFIG_USB_GADGET 1
#define CONFIG_SPL_EXT_SUPPORT 1
#define CONFIG_I2C 
#define CONFIG_LIB_RAND 
#define CONFIG_SIMPLE_BUS 1
#define CONFIG_USB_GADGET_PRODUCT_NUM 0xbd00
#define CONFIG_ARM_ASM_UNIFIED 1
#define CONFIG_CMD_MMC 1
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SPL_POWER_SUPPORT 1
#define CONFIG_SPL_DM_SEQ_ALIAS 1
#define CONFIG_DM_SPI 1
#define CONFIG_SPL_OF_LIBFDT 1
#define CONFIG_SPL_LOAD_FIT 1
#define CONFIG_SYS_I2C_BUS_MAX 3
#define CONFIG_SPL_SERIAL_PRESENT 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"

Fullscreen 0882.am437x-sk-evm.dts.txt Download

/*
 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* AM437x SK EVM */

/dts-v1/;

#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "TI AM437x SK EVM";
	compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";

	aliases {
		display0 = &lcd0;
	};

	chosen {
		stdout-path = &uart0;
		tick-timer = &timer2;
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
		brightness-levels = <0 51 53 56 62 75 101 152 255>;
		default-brightness-level = <8>;
	};

	sound {
		compatible = "ti,da830-evm-audio";
		ti,model = "AM437x-SK-EVM";
		ti,audio-codec = <&tlv320aic3106>;
		ti,mcasp-controller = <&mcasp1>;
		ti,codec-clock-rate = <24000000>;
		ti,audio-routing =
			"Headphone Jack",       "HPLOUT",
			"Headphone Jack",       "HPROUT";
	};

	matrix_keypad: matrix_keypad@0 {
		compatible = "gpio-matrix-keypad";

		pinctrl-names = "default";
		pinctrl-0 = <&matrix_keypad_pins>;

		debounce-delay-ms = <5>;
		col-scan-delay-us = <5>;

		row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH		/* Bank5, pin5 */
				&gpio5 6 GPIO_ACTIVE_HIGH>;	/* Bank5, pin6 */

		col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH		/* Bank5, pin13 */
				&gpio5 4 GPIO_ACTIVE_HIGH>;	/* Bank5, pin4 */

		linux,keymap = <
				MATRIX_KEY(0, 0, KEY_DOWN)
				MATRIX_KEY(0, 1, KEY_RIGHT)
				MATRIX_KEY(1, 0, KEY_LEFT)
				MATRIX_KEY(1, 1, KEY_UP)
			>;
	};

	leds {
		compatible = "gpio-leds";

		pinctrl-names = "default";
		pinctrl-0 = <&leds_pins>;

		led@0 {
			label = "am437x-sk:red:heartbeat";
			gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 0 */
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led@1 {
			label = "am437x-sk:green:mmc1";
			gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 1 */
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led@2 {
			label = "am437x-sk:blue:cpu0";
			gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 2 */
			linux,default-trigger = "cpu0";
			default-state = "off";
		};

		led@3 {
			label = "am437x-sk:blue:usr3";
			gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 3 */
			default-state = "off";
		};
	};

	lcd0: display {
		compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
		label = "lcd";

		pinctrl-names = "default";
		pinctrl-0 = <&lcd_pins>;

		enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;

		panel-timing {
			clock-frequency = <9000000>;
			hactive = <480>;
			vactive = <272>;
			hfront-porch = <2>;
			hback-porch = <2>;
			hsync-len = <41>;
			vfront-porch = <2>;
			vback-porch = <2>;
			vsync-len = <10>;
			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_out>;
			};
		};
	};
};

&am43xx_pinmux {
	matrix_keypad_pins: matrix_keypad_pins {
		pinctrl-single,pins = <
			0x24c (PIN_OUTPUT | MUX_MODE7)	/* gpio5_13.gpio5_13 */
			0x250 (PIN_OUTPUT | MUX_MODE7)	/* spi4_sclk.gpio5_4 */
			0x254 (PIN_INPUT | MUX_MODE7)	/* spi4_d0.gpio5_5 */
			0x258 (PIN_INPUT | MUX_MODE7)	/* spi4_d1.gpio5_5 */
		>;
	};

	leds_pins: leds_pins {
		pinctrl-single,pins = <
			0x228 (PIN_OUTPUT | MUX_MODE7)	/* uart3_rxd.gpio5_2 */
			0x22c (PIN_OUTPUT | MUX_MODE7)	/* uart3_txd.gpio5_3 */
			0x230 (PIN_OUTPUT | MUX_MODE7)	/* uart3_ctsn.gpio5_0 */
			0x234 (PIN_OUTPUT | MUX_MODE7)	/* uart3_rtsn.gpio5_1 */
		>;
	};

	i2c0_pins: i2c0_pins {
		pinctrl-single,pins = <
			0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
			0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins: i2c1_pins {
		pinctrl-single,pins = <
			0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
			0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
			0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
			0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
			0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
			0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
			0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
			0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {   //added for TTS2 Controller
        	pinctrl-single,pins = <
			0x80 (PIN_INPUT | MUX_MODE2) /* (B9)  gpmc_csn1.mmc1_clk */
			0x84 (PIN_INPUT | MUX_MODE2) /* (F10) gpmc_csn2.mmc1_cmd */
			0x20 (PIN_INPUT | MUX_MODE2) /* (B10) gpmc_ad8.mmc1_dat0 */
			0x24 (PIN_INPUT | MUX_MODE2) /* (A10) gpmc_ad9.mmc1_dat1 */
            		0x28 (PIN_INPUT | MUX_MODE2) /* (F11) gpmc_ad10.mmc1_dat2 */
            		0x2C (PIN_INPUT | MUX_MODE2) /* (D11) gpmc_ad11.mmc1_dat3 */
            		0x30 (PIN_INPUT | MUX_MODE2) /* (E11) gpmc_ad12.mmc1_dat4 */
            		0x34 (PIN_INPUT | MUX_MODE2) /* (C11) gpmc_ad13.mmc1_dat5 */
            		0x38 (PIN_INPUT | MUX_MODE2) /* (B11) gpmc_ad14.mmc1_dat6 */
            		0x3C (PIN_INPUT | MUX_MODE2) /* (A11) gpmc_ad15.mmc1_dat7 */
        	>;
    	};

	ecap0_pins: backlight_pins {
		pinctrl-single,pins = <
			0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
		>;
	};

	edt_ft5306_ts_pins: edt_ft5306_ts_pins {
		pinctrl-single,pins = <
			0x74 (PIN_INPUT | MUX_MODE7)	/* gpmc_wpn.gpio0_31 */
			0x78 (PIN_OUTPUT | MUX_MODE7)	/* gpmc_be1n.gpio1_28 */
		>;
	};

	vpfe0_pins_default: vpfe0_pins_default {
		pinctrl-single,pins = <
			0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
			0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
			0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_field mode 0*/
			0x1bc (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_wen mode 0*/
			0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
			0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
			0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
			0x208 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
			0x20c (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
			0x210 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
			0x214 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
			0x218 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
			0x21c (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
			0x220 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
			0x224 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
		>;
	};

	vpfe0_pins_sleep: vpfe0_pins_sleep {
		pinctrl-single,pins = <
			0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			0x12c (PIN_OUTPUT | MUX_MODE2)	/* mii1_txclk.rmii1_tclk */
			0x114 (PIN_OUTPUT | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			0x128 (PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			0x124 (PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			0x120 (PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td2 */
			0x11c (PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td3 */
			0x130 (PIN_INPUT | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
			0x118 (PIN_INPUT | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			0x140 (PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
			0x13c (PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			0x138 (PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd2 */
			0x134 (PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd3 */

			/* Slave 2 */
			0x58 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			0x40 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			0x54 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			0x50 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			0x4c (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			0x48 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			0x5c (PIN_INPUT | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
			0x44 (PIN_INPUT | MUX_MODE2)	/* gpmc_a1.rgmii2_rtcl */
			0x6c (PIN_INPUT | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
			0x68 (PIN_INPUT | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
			0x64 (PIN_INPUT | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
			0x60 (PIN_INPUT | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value */
			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			0x14c (PIN_OUTPUT | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	dss_pins: dss_pins {
		pinctrl-single,pins = <
//			0x020 (PIN_OUTPUT | MUX_MODE1)	/* gpmc ad 8 -> DSS DATA 23 */
//			0x024 (PIN_OUTPUT | MUX_MODE1)
//			0x028 (PIN_OUTPUT | MUX_MODE1)
//			0x02c (PIN_OUTPUT | MUX_MODE1)
//			0x030 (PIN_OUTPUT | MUX_MODE1)
//			0x034 (PIN_OUTPUT | MUX_MODE1)
//			0x038 (PIN_OUTPUT | MUX_MODE1)
//			0x03c (PIN_OUTPUT | MUX_MODE1)	/* gpmc ad 15 -> DSS DATA 16 */
			0x0a0 (PIN_OUTPUT | MUX_MODE0)	/* DSS DATA 0 */
			0x0a4 (PIN_OUTPUT | MUX_MODE0)
			0x0a8 (PIN_OUTPUT | MUX_MODE0)
			0x0ac (PIN_OUTPUT | MUX_MODE0)
			0x0b0 (PIN_OUTPUT | MUX_MODE0)
			0x0b4 (PIN_OUTPUT | MUX_MODE0)
			0x0b8 (PIN_OUTPUT | MUX_MODE0)
			0x0bc (PIN_OUTPUT | MUX_MODE0)
			0x0c0 (PIN_OUTPUT | MUX_MODE0)
			0x0c4 (PIN_OUTPUT | MUX_MODE0)
			0x0c8 (PIN_OUTPUT | MUX_MODE0)
			0x0cc (PIN_OUTPUT | MUX_MODE0)
			0x0d0 (PIN_OUTPUT | MUX_MODE0)
			0x0d4 (PIN_OUTPUT | MUX_MODE0)
			0x0d8 (PIN_OUTPUT | MUX_MODE0)
			0x0dc (PIN_OUTPUT | MUX_MODE0)	/* DSS DATA 15 */
			0x0e0 (PIN_OUTPUT | MUX_MODE0)	/* DSS VSYNC */
			0x0e4 (PIN_OUTPUT | MUX_MODE0)	/* DSS HSYNC */
			0x0e8 (PIN_OUTPUT | MUX_MODE0)	/* DSS PCLK */
			0x0ec (PIN_OUTPUT | MUX_MODE0)	/* DSS AC BIAS EN */

		>;
	};

	qspi_pins: qspi_pins {
		pinctrl-single,pins = <
			0x7c (PIN_OUTPUT | MUX_MODE3)	/* gpmc_csn0.qspi_csn */
			0x88 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_csn3.qspi_clk */
			0x90 (PIN_INPUT | MUX_MODE3)	/* gpmc_advn_ale.qspi_d0 */
			0x94 (PIN_INPUT | MUX_MODE3)	/* gpmc_oen_ren.qspi_d1 */
			0x98 (PIN_INPUT | MUX_MODE3)	/* gpmc_wen.qspi_d2 */
			0x9c (PIN_INPUT | MUX_MODE3)	/* gpmc_be0n_cle.qspi_d3 */
		>;
	};

	mcasp1_pins: mcasp1_pins {
		pinctrl-single,pins = <
			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_crs.mcasp1_aclkx */
			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_rxerr.mcasp1_fsx */
			0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* mii1_col.mcasp1_axr2 */
			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4)	/* rmii1_ref_clk.mcasp1_axr3 */
		>;
	};

	lcd_pins: lcd_pins {
		pinctrl-single,pins = <
			0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
		>;
	};

	usb1_pins: usb1_pins {
		pinctrl-single,pins = <
			0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
		>;
	};

	usb2_pins: usb2_pins {
		pinctrl-single,pins = <
			0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
		>;
	};
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <400000>;

	tps@24 {
		compatible = "ti,tps65218";
		reg = <0x24>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-controller;
		#interrupt-cells = <2>;

		dcdc1: regulator-dcdc1 {
			compatible = "ti,tps65218-dcdc1";
			/* VDD_CORE limits min of OPP50 and max of OPP100 */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1144000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc2: regulator-dcdc2 {
			compatible = "ti,tps65218-dcdc2";
			/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3: regulator-dcdc3 {
			compatible = "ti,tps65218-dcdc3";
			regulator-name = "vdds_ddr";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc4: regulator-dcdc4 {
			compatible = "ti,tps65218-dcdc4";
			regulator-name = "v3_3d";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo1: regulator-ldo1 {
			compatible = "ti,tps65218-ldo1";
			regulator-name = "v1_8d";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
		};

		power-button {
			compatible = "ti,tps65218-pwrbutton";
			status = "okay";
			interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
		};
	};

	at24@50 {
		compatible = "at24,24c256";
		pagesize = <64>;
		reg = <0x50>;
	};
};

&i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <400000>;

	edt-ft5306@38 {
		status = "okay";
		compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
		pinctrl-names = "default";
		pinctrl-0 = <&edt_ft5306_ts_pins>;

		reg = <0x38>;
		interrupt-parent = <&gpio0>;
		interrupts = <31 0>;

		reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;

		touchscreen-size-x = <480>;
		touchscreen-size-y = <272>;
	};

	tlv320aic3106: tlv320aic3106@1b {
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&dcdc4>;
		IOVDD-supply = <&dcdc4>;
		DRVDD-supply = <&dcdc4>;
		DVDD-supply = <&ldo1>;
	};

	lis331dlh@18 {
		compatible = "st,lis331dlh";
		reg = <0x18>;
		status = "okay";

		Vdd-supply = <&dcdc4>;
		Vdd_IO-supply = <&dcdc4>;
		interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
	};
};

&epwmss0 {
	status = "okay";
};

&ecap0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ecap0_pins>;
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio5 {
	status = "okay";
};

&mmc1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;

	vmmc-supply = <&dcdc4>;
	bus-width = <4>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&mmc2 {	//Added for TTS2
	status = "okay";
	vmmc-supply = <&dcdc4>;
	bus-width = <8>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	ti,non-removable;
};

&usb2_phy1 {
	status = "okay";
};

&usb1 {
	dr_mode = "peripheral";
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&usb1_pins>;
};

&usb2_phy2 {
	status = "okay";
};

&usb2 {
	dr_mode = "host";
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&usb2_pins>;
};

&qspi {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&qspi_pins>;

	spi-max-frequency = <48000000>;
	m25p80@0 {
		compatible = "mx66l51235l","spi-flash";
		spi-max-frequency = <48000000>;
		reg = <0>;
		spi-cpol;
		spi-cpha;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		#address-cells = <1>;
		#size-cells = <1>;

		/* MTD partition table.
		 * The ROM checks the first 512KiB
		 * for a valid file to boot(XIP).
		 */
		partition@0 {
			label = "QSPI.U_BOOT";
			reg = <0x00000000 0x000080000>;
		};
		partition@1 {
			label = "QSPI.U_BOOT.backup";
			reg = <0x00080000 0x00080000>;
		};
		partition@2 {
			label = "QSPI.U-BOOT-SPL_OS";
			reg = <0x00100000 0x00010000>;
		};
		partition@3 {
			label = "QSPI.U_BOOT_ENV";
			reg = <0x00110000 0x00010000>;
		};
		partition@4 {
			label = "QSPI.U-BOOT-ENV.backup";
			reg = <0x00120000 0x00010000>;
		};
		partition@5 {
			label = "QSPI.KERNEL";
			reg = <0x00130000 0x0800000>;
		};
		partition@6 {
			label = "QSPI.FILESYSTEM";
			reg = <0x00930000 0x36D0000>;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <4>;
	phy-mode = "rgmii";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <5>;
	phy-mode = "rgmii";
	dual_emac_res_vlan = <2>;
};

&elm {
	status = "okay";
};

&mcasp1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcasp1_pins>;

	status = "okay";

	op-mode = <0>;
	tdm-slots = <2>;
	serial-dir = <
		0 0 1 2
	>;

	tx-num-evt = <1>;
	rx-num-evt = <1>;
};

&dss {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_pins>;

	port {
		dpi_out: endpoint@0 {
			remote-endpoint = <&lcd_in>;
			data-lines = <16>;	//Was 24
		};
	};
};

&rtc {
	status = "okay";
};

&wdt {
	status = "okay";
};

&cpu {
	cpu0-supply = <&dcdc2>;
};

&vpfe0 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&vpfe0_pins_default>;
	pinctrl-1 = <&vpfe0_pins_sleep>;

	/* Camera port */
	port {
		vpfe0_ep: endpoint {
			/* remote-endpoint = <&sensor>; add once we have it */
			ti,am437x-vpfe-interface = <0>;
			bus-width = <8>;
			hsync-active = <0>;
			vsync-active = <0>;
		};
	};
};

. (I had to add '.txt' to the file names to allow uploading).

I can't open spl/u-boot-spl.dtb for inspection since it's a binary file. I have already confirmed that the am437x-sk-evm.dtb is pointing to the correct hardware address for mmc1 control.

0 Marcus Cooksey over 6 years ago in reply to Luke McKnew

TI__Genius 9510 points

spl/u-boot-spl.dtb is the dtb the MLO uses. This u-boot-spl.dtb is generated based on the dts set by define CONFIG_DEFAULT_DEVICE_TREE (see spl/u-boot.cfg) In your u-boot.cfg file, CONFIG_DEFAULT_DEVICE_TREE is set to "am437x-gp-evm". So you'll need to make mmc changes in this dts file.

BTW - you should still be available to open the binary file in "vi" and search for "mmc".

0 Luke McKnew over 6 years ago in reply to Marcus Cooksey

Prodigy 130 points

Here's what I get when I use 'vi' to view the binary, with and without the '-b' tag the output is the same. Some ASCII characters are present but adding the mmc2 definition to am437x-gp-evm.dts (using code that worked to add the eMMC in am437x-sk-evm.dts) didn't put any entries for mmc@481d8000. It's hard to tell because there are a lot of parts defined in the default dtb that aren't visible in ASCII in the file so it could be there or it may not.

When I perform the build the files 'am437x-gp-evm.dtb' and 'u-boot-spl.dtb' both have new timestamps so I know they're getting rebuilt but it doesn't look like '<u-boot>/arch/arm/dts/am437x-gp-evm.dtb' is getting into the '<u-boot>/spl/u-boot-spl.dtb'. I tried adding the second mmc interface to 'am437x-gp-evm.dts' early on precisely because I saw it was the default used by u-boot but it didn't fix the problem. That was a step I took prior to making this thread. I just added the definition of the eMMC interface into the file now but I am unable to test it out on the hardware until tomorrow. However I did generate a copy of u-boot-spl.dtb with the original gp-evm dts and one with my modifications to compare if the interface definition caused any changes and there are only 5 bytes that are different between the 2 version so I don't think that solves the problem.

0 Marcus Cooksey over 6 years ago in reply to Luke McKnew

TI__Genius 9510 points

The DTS file am437x-gp-evm.dtb is parsed by SPL, however the Makefile in <u-boot>/dts removes all nodes that don't include the u-boot,dm-spl property. You can either change mmc1 to mmc2 in file <u-boot>/arch/arm/dts/am437x-gp-evm-u-boot.dtsi or add a new entry for mmc2.

0 Luke McKnew over 6 years ago in reply to Marcus Cooksey

Prodigy 130 points

Alright Marcus! That did it for us. The SPL environment now boots from the eMMC. I can get into u-boot and modify the environment and then boot into the linux file system all from the eMMC on mmc1. Thanks for your help!

For any future development, do you know where this final piece (the u-boot specific .dtsi file) is documented? We spent a good deal of time researching this process before starting the E2E thread and in general we try to do our due diligence before escalating issues to this forum.

Thanks again.

0 Marcus Cooksey over 6 years ago in reply to Luke McKnew

TI__Genius 9510 points

Luke - I've received your feedback and will open an internal ticket to enhance our documentation to explain this specific property.

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AM4378: eMMC not found in U-boot