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Tool/software: Linux
Hello Experts,
We have one requirement to operate CPU and DDR at 600 Mhz and 400 Mhz respectively. Found TI's wiki http://processors.wiki.ti.com/index.php/Linux_Porting_Guide_for_AM571x/AM570x_Speed_Grades
In the above wiki for 500 Mhz structure is mentioned like
static const struct dpll_params mpu_dpll_params_500mhz[NUM_SYS_CLKS] = { {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */ {200, 7, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */ {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */ {365, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */ {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */ {500, 26, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 27 MHz */ {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 38.4 MHz */ };
Could you please let me know what is logic for the above structure and how to create structure for 600 Mhz.
Thanks,
Gourav
Hi Roy,
It depends on what is your main crystal frequency. On AM572x TI EVM we have 20MHz main clock source, thus for 1GHz we have:
/* OPP NOM FREQUENCY for OMAP5 ES2.0, and DRA7 ES1.0 */
static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
{250, 2, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */
{500, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */
{119, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */
{625, 11, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
{500, 12, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */
{-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 27 MHz */
{625, 23, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 38.4 MHz */
};
This line means we have M=500, N=9, M2=1, the rest of the parameters (M3, M4, M4, M7, H21, H22, H23, H24) are not applicable, thus filled with -1.
The formulas are:
Fdpll = Fref x 2 x M / (N+1) = 20 x 2 x 500 / (9 + 1) = 2000
CLKOUT_M2 = Fdpll / (2 x M2) = 2000 / (2 x 1) = 1000 = 1GHz
gourav roy said:static const struct dpll_params mpu_dpll_params_500mhz[NUM_SYS_CLKS] = { {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */ {200, 7, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */
Here we have:
Fdpll = Fref x 2 x M / (N+1) = 20 x 2 x 200 / (7 + 1) = 1000
CLKOUT_M2 = Fdpll / (2 x M2) = 1000 / (2 x 1) = 500MHz
So for 600MHz with 20MHz crystal you can use the below line:
{300, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */
or
{240, 7, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */
For more info check below TRM sections:
3.6.3.3.2 DPLLs Output Clocks Parameters
3.6.3.7 DPLL_MPU Description
And below u-boot files:
u-boot/arch/arm/mach-omap2/omap5/hw_data.c
u-boot/arch/arm/mach-omap2/clocks-common.c
u-boot/arch/arm/include/asm/omap_common.h
Check also below e2e threads:
DRA712: How to change CPU freq from 1Ghz to 600Mhz - Processors forum - Processors - TI E2E support ...
Linux/AM5726: Power reduction in U-boot - Processors forum - Processors - TI E2E support forums
https://e2e.ti.com/support/legacy_forums/omap/f/885/t/338011
Regards,
Pavel
Thanks Pavel,
Could you please let me know, how to verify clock frequency of DDR once board boot up.
We can verity cpu frequency on running board by
root@am57xx-evm:/sys/devices/system/cpu/cpu0/cpufreq# cat cpuinfo_cur_freq
In similar manner is there any procedure to get DDR clock on board?
Thanks,
Gourav