Linux/AM5728: Use as PCIe EP and source external clock

More information, I am using the development board along with an external i5 mother board.
I am also configuring the end point using processors.wiki.ti.com/.../Linux_Core_PCIe_EP_User's_Guide

Hi Andrew,

Do you use AM57x TI PSDK Linux 4.03 (kernel 4.9.69)?

software-dl.ti.com/.../index_FDS.html

Do you use AM57x TI board (EVM or IDK) or custom board?

Regards,
Pavel

Hi Pavel, 

I am working with Kernel 4.9.41 supported from Phytec.

The board I am working with is a development board from Phytec. I attached the link below.

"wiki.phytec.com/.../phyCORE-AM57x Rapid Development Kit"

I posted here because I believe this is directly related to register settings of the AM5728.

Any and all help is appreciated.

Regards,

Andrew,

Please check if below e2e threads will be in help:

e2e.ti.com/.../653443
e2e.ti.com/.../506941
e2e.ti.com/.../571768

Regards,
Pavel

Hi Pavel,

I have seen these threads and no they do not answer my question. I am using Linux and would like to know how to set in software bit 7 of 0x4A00821c register. 

Andrew,

Check below files:

linux-kernel/Documentation/devicetree/bindings/clock/ti/apll.txt
linux-kernel/arch/arm/boot/dts/dra7xx-clocks.dtsi

You need to setup pciesref_acs_clk_ck:

apll_pcie_in_clk_mux: apll_pcie_in_clk_mux@4ae06118 {
compatible = "ti,mux-clock";
clocks = <&dpll_pcie_ref_m2ldo_ck>, <&pciesref_acs_clk_ck>;
#clock-cells = <0>;
reg = <0x021c 0x4>;
ti,bit-shift = <7>;
};

pciesref_acs_clk_ck: pciesref_acs_clk_ck {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
};

apll_pcie_ck: apll_pcie_ck@21c {
#clock-cells = <0>;
compatible = "ti,dra7-apll-clock";
clocks = <&apll_pcie_in_clk_mux>, <&dpll_pcie_ref_ck>;
reg = <0x021c>, <0x0220>;
};

Check below wiki:

processors.wiki.ti.com/.../Clock_Framework_User_Guide

Regards,
Pavel

Thank you for your reply, all though this does not resolve my issue. The information provided and link would be used to write a kernel driver. I am attempting to set bits for pcie enumeration before the driver is kicked off.

In the AM572X Sitara Technical Reference Manual table 26-61 list numerous steps to properly setup the PCIe phy subsystem, one includes setting bit 7 of 0x4A00821c . I am looking to find out in software where and how these instructions are being used.

Regards,

Another option is to modify linux-kernel/drivers/clk/ti/clk-7xx.c file, function dra7xx_dt_clk_init(). You can set parent clock for apll_pcie_in_clk_mux to be pciesref_acs_clk_ck. Should be something like below:

struct clk *pcie_ref;

pcie_ref = clk_get_sys(NULL, "apll_pcie_in_clk_mux");
rc = clk_set_parent(pcie_ref, pciesref_acs_clk_ck);

You can refer to OMAP5 ABE mux for example:

linux-kernel/drivers/clk/ti/clk-54xx.c
linux-kernel/arch/arm/boot/dts/omap54xx-clocks.dtsi

abe_dpll_clk_mux: abe_dpll_clk_mux@10c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&sys_clkin>, <&sys_32k_ck>;
reg = <0x010c>;
};

int rc;
struct clk *abe_dpll_ref;

abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux");
rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);


Regards<
Pavel

If you have no more questions related to the subject of this e2e thread, please close/verify/resolve this thread.

Regards,
Pavel