TMS320C6711D: Question of transitioning from 6711B to 6711D part

Hi Aaron,

From reading the migration guide and datasheet, it seems likely possible that the C6711D (with all necessary hardware changes) could operate with software for the C6711B with a faster CLKIN frequency. The CLKIN input can receive a frequency upto 250MHz. The PLL seems to default to a bypassed state and output clock dividers set into compatible /1, /2 states.

I have concerns about the wording in the migration guide from section 1.3.1 In PLL Mode, External PLL Components/Circuit Must be Modified...
"In bypass mode, the PLL circuit is still required. However, regardless of bypass or PLL mode, the PLL controller peripheral must be programmed to generate desired clocks."

And further concerns about similar language in the PLL Reference Guide (SPRU233C)...
"The PLL and PLL controller are to be initialized by software after reset. The PLL controller registers should be modified only by the CPU or via emulation. The HPI should not be used to directly access the PLL controller registers. The initialization of the PLL controller should be performed as soon as possible at the beginning of the program, before initializing any peripherals. Upon device reset, one of the following two software initialization procedures must be done to properly set up the PLL and PLL controller.
1) 3.1.1 Initialization to PLL Mode (PLLEN = 1)
2) 3.1.2 Initialization to Bypass Mode (PLLEN = 0)"

I am afraid finding a definite answer without trying it might be unreliable, with an older device like this. It might be best to try to hack it up on an existing board.

What is the boot source being used on the existing C6711B design?

Regards,
Mark