Hello,
We have some questions about the relationship between DMA transfer to OCMC and CPU access to OCMC on AM5748.
There are two DMA module, System DMA and Enhanced DMA, so could you confirm the following questions against each DMA?
1.While DMA is transferring data to OCMC, and at the timing when A15 is going to access OCMC, is DMA able to suspend the processing transaction and release the bus (channel) resource?
2.If the answer of question 2 is yes, could you tell us the timing when the bus resource is released?
We want to know, for example, the timing is the end of block transfer, the end of burst transfer, or something.
Best Regards,
Nomo
