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CCS/TDA2EVM5777: TDA2x Vision EVM Kit – Spectrum Digital (Includes CPU Board and Vision Application Board) Compile and Upload

Part Number: TDA2EVM5777

Tool/software: Code Composer Studio

Hello Guys,

I am working on this TDA2XX Kit  and Want to run the Vision SDK user cases on the board. I have already installed the VISION SDK Latest version And followed the user guide and results were achieved as

Well i was able to compile the SDK using gmake and generated all the binaries, but i am having the problem in running them on multiple cores.

I will be explaining the whole procedure what i followed & Some queries i  have marked with bold Lines.

1.  The User guide Says " set required config MAKECONFIG=tda2xx_evm_bios_all"  As i open the file  Rules.make    ,it was  defined as

MAKECONFIG?=tda2xx_evm_bios_all, does that mean i have to remove the '?' symbol? (Please answer this)

3. Also i have set the  NDK_PROC_TO_USE is to be set for ipu1_ 1 as mentioned in user guide for Building AVB application .

4.>>then i ran it using gmake commands and compilation was successful, the binaries are generated as in the image attached

  

5. Now  as the guide mentions that load the binaries as 

On ARP32_EVE_4, load the binary, “vision_sdk_arp32_4_release.xearp32F”.

On ARP32_EVE_3, load the binary, “vision_sdk_arp32_3_release.xearp32F”.

On ARP32_EVE_2, load the binary, “vision_sdk_arp32_2_release.xearp32F”.

On ARP32_EVE_1, load the binary, “vision_sdk_arp32_1_release.xearp32F”.

On C66xx_DSP2, load the binary, “vision_sdk_c66xdsp_2_release.xe66”.

On C66xx_DSP1, load the binary, “vision_sdk_c66xdsp_1_release.xe66”.

On Cortex_M4_IPU1_C0, load the binary, “vision_sdk_ipu1_0_release.xem4”.

On Cortex_M4_IPU1_C1, load the binary, “vision_sdk_ipu1_1_release.xem4”.

On CortexA15_0, load the binary, "vision_sdk_a15_0_debug.xa15fg”

And the line  "On CortexA15_0, load the binary, "vision_sdk_a15_0_debug.xa15fg” mentions that debug.xa15g  but the gmake has generated it as  "vision_sdk_a15_0_release.xa15fg.

Are they both same?

 

6. After loading the respective files on respective cores, Should i run the cores one by one or in a sequence or any other way.

7. do we have to connect and load the IPU2_0 & IPU2_1 cores also?

 

 

 I know its too much to ask but please try to Answer my queries,

 

Regards

Sajad