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RTOS/AM5728: GPIO interrupt

Part Number: AM5728


Tool/software: TI-RTOS

Hi,

I am using  PROCESSOR-SDK-RTOS-AM57X - pdk_am57xx_1_0_7

we are trying to handle the interrupt which is triggered by the FPGA  to DSP on the gpio2_19 pin.

But, when we try to use this GPIO we receive bad IRQ interrupt in ARM linux.

 ------------------------------------------Logs start ----------------------------------------------------------

[  370.329813] irq 88, desc: eea35d80, depth: 1, count: 0, unhandled: 0

[  370.336198] ->handle_irq():  c007e908, handle_bad_irq+0x0/0x280

[  370.342159] ->irq_data.chip(): eea34d90, 0xeea34d90

[  370.347065] ->action():   (null)

[  370.350304]    IRQ_NOPROBE set

[  370.353369] unexpected IRQ trap at vector 58

-------------------------------------------Logs End--------------------------------------------------------------------

We are configuring the gpio pin as below,

pinmux to work as gpio2_19,

#define GPIO_FPGA_INTR_PORT_NUM  0x2;

#define  GPIO_FPGA_INTR_PIN_NUM  0x13;

regVal = 0x5000E

((CSL_padRegsOvly) CSL_MPU_CORE_PAD_IO_REGISTERS_REGS)->PAD_GPMC_CS0 = regVal;//gpio2_19

GPIO_DEVICE_CONFIG(GPIO_FPGA_INTR_PORT_NUM, GPIO_FPGA_INTR_PIN_NUM) |
GPIO_CFG_INPUT | GPIO_CFG_IN_INT_RISING

ISR to handle the interrupt,

void FpgaGpioInt()
{
Log_print0(Diags_USER1, "***** interrupt occured *****");

}

void config_gpio_callback()
{
GPIO_setCallback(BOSE_GPIO_FPGA_INTR, FpgaGpioInt);
GPIO_enableInt(BOSE_GPIO_FPGA_INTR);
}

Crossbar IRQ for gpio2

CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_DSP1, CSL_XBAR_INST_DSP1_IRQ_56, CSL_XBAR_GPIO2_IRQ_1);//gpio2_irq

after registering am calling the ISR

config_gpio_callback();

Can you tell us whats going wrong in the above procedure,why am getting IRQ interrupt error?

Thanks and regards,

Ranganath

  • Ranganath,

    When configuring a GPIO on the RTOS side, you will need to disable it in the Linux device tree. Refer to the below e2e thread for details:

    e2e.ti.com/.../737886
    e2e.ti.com/.../752268
    e2e.ti.com/.../2774117

    Regards,
    Pavel
  • Hi pavel,
    Thanks for the reply,
    Can you please let me know how to disable the particular pin in device tree without disturbing the other pins in the same bank.
    Currently we want to disable the gpio2_19 pin only, without affecting other pins of GPIO2 bank, because most of them are used by ARM linux.
  • Ranganath,

    On AM57x TI board, gpio2-19 is used only for Am571x IDK at below file:

    linux-kernel/arch/arm/boot/dts/am571x-idk-common.dtsi

    You can remove the mmc0-led node from the DTS, thus you will disable only gpio2_19 pin usage, not the whole GPIO2 bank.

    leds {
    compatible = "gpio-leds";
    mmc0-led {
    label = "status1:blue:mmc0";
    gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
    default-state = "off";
    linux,default-trigger = "mmc0";
    };
    };

    Regards,
    Pavel
  • Hi Pavel,

    Thanks for the reply.

    We tried to disable the GPIO2_19 from the linux dtb file as follow,

    gpio@48055000 {
    compatible = "ti,omap4-gpio";
     reg = <0x48055000 0x200>;
     interrupts = <0x0 0x19 0x4>;
     ti,hwmods = "gpio2";
     gpio-controller;
     #gpio-cells = <0x2>;
     interrupt-controller;
     #interrupt-cells = <0x2>;
     linux,phandle = <0x14d>;
     phandle = <0x14d>;
     };

    led@2 {
    label = "am57xx-pcm-948:usr1";
    /*gpios = <0xcc 0x1a 0x0>;*/
     gpios = <0x14d 0x13 0x0>;
     linux,default-trigger = "gpio";
     default-state = "off";
     };

    we are receiving interrupt in the DSP1 but, still we are getting the bad IRQ from the linux kernel.

    Also we observed 20-30% of interrupts in the DSP1.

    We are disabling the GPIO2_19 in the dtb file. why we are getting bad IRQ error from the linux kernel. 

    why we are missing the interrupts in the DSP1, anything wrong in the procedure that we followed?

    thanks,

    Ranganath

  • In addition to the above here am attaching the image.

    Here am toggling the another GPIO when i receive interrupt from FPGA. Blue line shows that the interrupts are coming from the FPGA for every 10ms.

    Green line shows that we are missing some interrupts in the DSP1.  

    we are enabling the interrupt handler in DSP, how linux is getting bad IRQ error?

    How to configure the interrupt handler only for the DSP1?

     

       

  • Ranganath,

    Regarding GPIO irq configuration for ARM Linux, you can check whitch functions are used in below wiki. Then you can trace and search the kernel code for that GPIO irq enable mechanism and remove it.

    processors.wiki.ti.com/.../Linux_PSP_GPIO_Driver_Guide

    You can also use the omapconf tool to check if and which GPIO interrupt exactly is configured and used for ARM Linux. You can see in which ARM Interrupt controller register this is done, and change it per your needs.

    Refer to the below e2e thread for details regarding ARM Linux interrupt usage:

    e2e.ti.com/.../2769532

    Regards,
    Pavel
  • Hi,

    thanks for your response.

    we didn't get complete answer for the previous query, about missing the interrupts.

     regVal = 0x5000E;
               ((CSL_padRegsOvly) CSL_MPU_CORE_PAD_IO_REGISTERS_REGS)->PAD_GPMC_CS0 = regVal; // pinMUX for gpio2_19


      CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_DSP1, CSL_XBAR_INST_DSP1_IRQ_56, CSL_XBAR_GPIO2_IRQ_1); // is this line is correct or not?


      
      Hwi_Params  hwiInputParams;
       Error_Block eb;

       Hwi_Handle myhandle;

       Error_init(&eb);

       Hwi_Params_init(&hwiInputParams);

       hwiInputParams.arg = 1;
       hwiInputParams.priority = 1;
       hwiInputParams.eventId =  CSL_XBAR_INST_DSP1_IRQ_56 / 32; // what is eventId ? for our case how to set the eventid?
       hwiInputParams.enableInt = TRUE;
       hwiInputParams.maskSetting = Hwi_MaskingOption_SELF; // we didn't understand what is this masking?

       myhandle = Hwi_create(11, FpgaGpioInt, &hwiInputParams,&eb); // 11 -> what is interrupt number, how to set the interrupt number ?

    with the above changes, now we are getting the interrupts consecutively twice as attached in the below image.

    why this is happening,why the ISR is calling twice?

    blue is fpga interrupt and yellow is toggling the gpio on reception of interrupt.

  • Ranganath V N said:

      CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_DSP1, CSL_XBAR_INST_DSP1_IRQ_56, CSL_XBAR_GPIO2_IRQ_1); // is this line is correct or not?

    If you want to use gpio2_irq_1 for DSP interrupt, then this line is correct. You can also check what value you have in CTRL_CORE_DSP1_IRQ_56_57[8:0] DSP1_IRQ_56 bit field. Note that the default value is 0x19 (25), which means you have there gpio2_irq_1 by default and no need to configure it.

    CSL_xbarIrqConfigure() is used to enable GPIO irq in C66x DSP1, while GPIO_enableInt() is used to enable GPIO irq at GPIO module level (GPIO_IRQSTATUS_SET register).

    For Hwi_create() info, check below e2e thread:

    I will also check your other questions and come back to you.

    Regards,
    Pavel

  • Ranganath V N said:
     hwiInputParams.eventId =  CSL_XBAR_INST_DSP1_IRQ_56 / 32; // what is eventId ? for our case how to set the eventid?

    This line is not correct.

    There are two methods to configure GPIO interrupt:

    1. through OSAL layer(OS Abstraction layer) to setup the interrupt configuration, CSL_xbarIrqConfigure()

    2. through Hwi_create()

    If using the second method, you can refer to the PCI example, discussed in below e2e thread:

    Note that you should use hwiInputParams.evtId, instead of hwiInputParams.eventId

    Regards,
    Pavel