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AM5728: DSP1 clock on clkout3

Part Number: AM5728

Hi,

I am trying to get the DSP1 clock on clkout3 pin ( Pin 41 of P17) of Sitara AM5728 development board. I am running application on DSP with the help of debugger. I have done following register settings to get DSP1 clock on clkout3 pin

CM_CLKSEL_CLKOUTMUX0 ( 0x4AE06158) = 0x04 

CM_CLKSEL_DSP_GFCLK_CLKOUTMUX (0x4AE0618C) = 0x00 

CM_IPU_TIMER5_CLKCTRL (0x4A005558) = 0x0B000002

I do not see any clock on clkout3 pin. 

In the clock tree tool I do not see an input to the block for the DSP GFCLK clock. 

How can I get the DSP clock on clkout3 pin or other pin to see the DSP configured clock.

  • Hi Indra,

    What value you have in CTRL_CORE_PAD_XREF_CLK3 register? Make sure it is setup for clkour3 mode.

    You can also try to set CM_CLKSEL_CLKOUTMUX0 register to export sys_clk1 signal and check if you will be able to see that signal. If yes, then you need to check if DSP1 is ON and operational.

    Regards,
    Pavel
  • The CTRL_CORE_PAD_XREF_CLK3 register has mode set to clkout3
  • Indra,

    Can you also check the value of CTRL_CORE_PAD_XREF_CLK3[18] XREF_CLK3_INPUTENABLE ? If 1, can you set it as output (write 0) and test again, do you see the DSP1 clock output?

    I would also suggest you to to first test to export sys_clk1 (20MHz) signal on clkout3 pin, once successful, you can proceed with dsp1 clock. Are you able to measure the sys_clk1 clock on clkout3 pin? Below registers are related to exporting sys_clk1 on clkout3 pin:

    CM_CLKSEL_SYS_CLK1_CLKOUTMUX
    CM_CLKSEL_CLKOUTMUX0

    Check also if below e2e threads will be in help:

    e2e.ti.com/.../1718034
    e2e.ti.com/.../571167
    e2e.ti.com/.../651530



    Here's my summary:

    1. The pin muxing must be correctly configured for the pin you're trying to use.

    2. The clock you want to output (MPU_DCLK, DSP_GCLK, etc.) should be selected through the CM_CLKSEL_CLKOUTx register where x = 1,2,3.

    3. The clock must be ungated. This procedure varies by clock.
    a.CLKOUT1 can be ungated by setting CM_COREAON_CLKOUTMUX1_CLKCTRL[OPTFCLKEN_CLKOUTMUX1_CLK] = 1.
    b.CLKOUT2 can be ungated by setting CM_COREAON_CLKOUTMUX2_CLKCTRL[OPTFCLKEN_CLKOUTMUX2_CLK] = 1.
    c.CLKOUT3 can be ungated by configuring any of the CM_IPU_TIMERx_CLKCTRL registers where x = 5, 6, 7, or 8. Specifically, you should set CLKOUT = 0xB (CLKOUT3_CLK) and MODULEMODE = 2 (enabled).

    4. If you’re trying to output the MPU clock specifically then you need to also set a bit called HWOBS_MACRO_ENABLE. Note that there’s a /4 in the path. So whatever you’ve configured in CM_CLKSEL_MPU_GCLK_CLKOUTMUX will apply, and additionally another /4.


    Regards,
    Pavel
  • Hi,

    I was able to get the SYS_CLK1 (20 MHz) on clkout3 pin. But DSP clock on clokout3 pin is not coming.

    Best Regards
    Indra
  • Hi,

    I was able to get the SYS_CLK1 (20 MHz) on clkout3 pin. But DSP clock on clokout3 pin is not coming.

    Best Regards
    Indra
  • Indra,

    Can you provide register dump of below registers:

    CM_DSP1_CLKSTCTRL
    CM_DSP1_DSP1_CLKCTRL

    CM_CLKMODE_DPLL_DSP
    CM_IDLEST_DPLL_DSP
    CM_AUTOIDLE_DPLL_DSP
    CM_CLKSEL_DPLL_DSP
    CM_DIV_M2_DPLL_DSP
    CM_DIV_M3_DPLL_DSP


    Regards,
    Pavel
  • HI Pavel,

    I was able to get the DSP clock on clkout3 pin. There was error in the register configuration. Thank you for your support.

    Regards

    Indra