Part Number: TMS320C6678
Tool/software: TI-RTOS
Hi,
We are using SRIO(2 x2lanes) and Ethernet in our custom board which has C6678,
When data transfer using SRIO is continuous, Ethernet(ping) is not working and if we add any delay between the SRIO transfers or if SRIO and Ethernet are used one after the other, Ethernet is working.
Below are the QMSS configurations done in our code,
Could you please tell me if there are any changes required for both to work simultaneously.
/** ============================================================================
* @n@b res_mgr_init_cppi
*
* @b Description
* @n This API initializes the CPPI LLD, opens the PDMA and opens up
* the Tx, Rx channels required for data transfers.
*
* @param[in] p_qmss_cfg
* Pointer to CPPI_CFG_T
*
* @return int32_t
* -1 - Error
* 0 - Success
* =============================================================================
*/
int32_t res_mgr_init_cppi(CPPI_CFG_T *p_cppi_cfg)
{
int32_t result, i;
Cppi_CpDmaInitCfg cpdmaCfg;
uint8_t isAllocated;
Cppi_TxChInitCfg txChCfg;
Cppi_RxChInitCfg rxChInitCfg;
Cppi_Handle *p_handle = NULL;
Cppi_ChHnd *p_ch_handle = NULL;
if (p_cppi_cfg->master_core)
{
/* Initialize CPPI LLD */
#if defined(DEVICE_K2H) || defined(DEVICE_K2K)
result = Cppi_init (&cppiGblCfgParams);
#else
result = Cppi_init (&cppiGblCfgParams);
#endif
if (result != CPPI_SOK)
{
platform_write("Error initializing CPPI LLD, Error code : %d\n", result);
return -1;
}
}
/* Initialise CPDMA */
memset (&cpdmaCfg, 0, sizeof (Cppi_CpDmaInitCfg));
cpdmaCfg.dmaNum = p_cppi_cfg->dma_num;
if (cpdmaCfg.dmaNum == Cppi_CpDma_PASS_CPDMA)
{
p_handle = &gPassCpdmaHnd;
memcpy(&gCppiCfg[CPPI_CFG_PASS], p_cppi_cfg, sizeof(CPPI_CFG_T));
}
if (p_handle)
{
if ((*p_handle = Cppi_open (&cpdmaCfg)) == NULL)
{
platform_write ("Error initializing CPPI for CPDMA %d \n", cpdmaCfg.dmaNum);
return -1;
}
}
else
{
return -1;
}
/* Open all CPPI Tx Channels. These will be used to send data to PASS/CPSW */
for (i = 0; i < p_cppi_cfg->num_tx_queues; i ++)
{
txChCfg.channelNum = i; /* CPPI channels are mapped one-one to the PA Tx queues */
txChCfg.txEnable = Cppi_ChState_CHANNEL_DISABLE; /* Disable the channel for now. */
txChCfg.filterEPIB = 0;
txChCfg.filterPS = 0;
txChCfg.aifMonoMode = 0;
txChCfg.priority = 2;
if (cpdmaCfg.dmaNum == Cppi_CpDma_PASS_CPDMA)
{
p_ch_handle = &gPassCpdmaTxChanHnd[i];
}
if (p_ch_handle == NULL)
{
return -1;
}
if ((*p_ch_handle = Cppi_txChannelOpen (*p_handle, &txChCfg, &isAllocated)) == NULL)
{
platform_write ("Error opening Tx channel %d\n", txChCfg.channelNum);
return -1;
}
Cppi_channelEnable (*
}
/* Open all CPPI Rx channels. These will be used by PA to stream data out. */
for (i = 0; i < p_cppi_cfg->num_rx_channels; i++)
{
/* Open a CPPI Rx channel that will be used by PA to stream data out. */
rxChInitCfg.channelNum = i;
rxChInitCfg.rxEnable = Cppi_ChState_CHANNEL_DISABLE;
if ((gPassCpdmaRxChanHnd[i] = Cppi_rxChannelOpen (*p_handle, &rxChInitCfg, &isAllocated)) == NULL)
{
platform_write("Error opening Rx channel: %d \n", rxChInitCfg.channelNum);
return -1;
}
/* Also enable Rx Channel */
Cppi_channelEnable (gPassCpdmaRxChanHnd[i]);
}
/* Clear CPPI Loobpack bit in PASS CDMA Global Emulation Control Register */
Cppi_setCpdmaLoopback(*p_handle, 0);
/* CPPI Init Done. Return success */
return 0;
}
/*-----------------------------------------------------------------------------
* @n@b system_init_srio_eth
*
* @b Description
* @n Configure ethernet as well as SRIO
* @ Also configure QMSS and CPPI for both communication
*
*
* @param[in]
* @n None
*
* @return int32_t
* -1 - Error
* 0 - Success
*---------------------------------------------------------------------------*/
Int32 system_init_srio_eth(Void)
{
Int32 result;
Qmss_MemRegInfo memRegInfo;
QMSS_CFG_T qmss_cfg;
CPPI_CFG_T cppi_cfg;
/* Initialize the QMSS Configuration block. */
memset (&qmssInitConfig, 0, sizeof (Qmss_InitCfg));
printf(" system_init_srio_eth\n");
/* Initialize the Host Region. */
memset ((void *)&host_region, 0, sizeof(host_region));
qmss_cfg.master_core = 1;
qmss_cfg.max_num_desc = 256;
qmss_cfg.desc_size = 512;
qmss_cfg.mem_region = Qmss_MemRegion_MEMORY_REGION0;
if (res_mgr_init_qmss(&qmss_cfg) != 0)
{
printf(" Failed to initialize QMSS for Ethernet\n");
}
else
{
printf(" QMSS for Ethernet successfully initialized \n");
}
/* Memory Region 0 Configuration */
memRegInfo.descBase = (UInt32 *)l2_global_address((UInt32)host_region);
memRegInfo.descNum = 128;
memRegInfo.descSize = 256;
memRegInfo.manageDescFlag = Qmss_ManageDesc_MANAGE_DESCRIPTOR;
memRegInfo.memRegion = Qmss_MemRegion_MEMORY_REGION1;
memRegInfo.startIndex = 256;
/* Initialize and insert the memory region. */
result = Qmss_insertMemoryRegion (&memRegInfo);
if (result < QMSS_SOK)
{
printf(" Problem inserting memory for SRIO region: %d\n", result);
}
else
{
ETH_CFG_DBG_PRINT(" Successfully inserted memory region for SRIO: %d\n", result);
}
printf(" QMSS Desc address after Qmss_insertMemoryRegion :0x%x\n",memRegInfo.descBase);
/* Initialize CPPI */
cppi_cfg.master_core = 1;
cppi_cfg.dma_num = Cppi_CpDma_PASS_CPDMA;
cppi_cfg.num_tx_queues = NUM_PA_TX_QUEUES;
cppi_cfg.num_rx_channels = NUM_PA_RX_CHANNELS;
if (res_mgr_init_cppi (&cppi_cfg) != 0)
{
printf(" Failed to initialize CPPI subsystem \n");
}
else
{
ETH_CFG_DBG_PRINT(" CPPI successfully initialized \n");
}
if (res_mgr_init_pass()!= 0)
{
printf(" Failed to initialize Packet Accelerator \n");
}
else
{
printf(" Packet Accelerator successfully initialized\n");
}
/* CPPI and Queue Manager are initialized. */
return result;
}
Thanks,
Mounika
