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Original question:

Linux/AM5728: IPU cannot read CMEM memory

Linux/AM5718: IPU cannot read CMEM memory

Sung-IL
Mastermind 30810 points
Part Number: AM5718

Tool/software: Linux

Dear Champs,

My customer moved to AM5718 and upgrade SDK to 5.00.00.15, but they still faced same issue they reported in below.

https://e2e.ti.com/support/processors/f/791/t/693977

As you see in above, IPC between ARM and DSP works well, but there is a problem when IPU tried to read data in CMEM.

They can resolve this issue by using CMEM_CacheInvalidate(), but it is hard for them to add this function call in every code using IPC.

So, they are trying to make CMEM to be NON-CACHED, but it did not worked and IPC can not read alhtough this NON-CACHED setting.

Could you please check how they can set CMEM as NON-CACHED and how they make IPU read the data in that region of CMEM?

After they set CMEM as NON-CACHED, should they re-build IPU image?

I uploaded their test code in below.

IPUCMEM_ERR_EX.tar.gz

Thanks and Best Regards,

SI.

  • 0
    TI__Guru 50170 points
    Hi, Sung-Il,
    You mentioned that customer can resolve the issue by using CMEM_CacheInvalidate(). Is the CMEM in this case configured as CACHED?
    So, the issue happens in the following 2 cases:
    1. CMEM configured as Cached, but not issuing CMEM_CacheInvalidate().
    2. CMEM configured as CMEM_NONCACHED.
    Is it still true that the ARM and DSP can read from CMEM the data written by IPU?
    Only the IPU read is not getting the data?

    Rex
  • 0 in reply to Rex Chang
    TI__Mastermind 30810 points
    Hi Rex,



    Yes. you are right, but I made a mistake in my description.

    Let me summarize customer's issue again.



    SDK is Linux-RT-05.00.00.15.

    And, they failed also to read data in CMEM from IPU even with using CMEM_CacheInv().

    So, I can summarize the cases when issue happen as below.

    1. CMEM configured as Cached w/ CMEM_CacheInv()

    2. CMEM configured as CMEM_NONCACHED.

    One strange thing is that they can read right data in the CMEM from IPU at boot time. But, after around 3 sec from boot time, they could not read right data from IPU. e.g. after 3sec from boot time, they read only wrong data from IPU.

    They have this test only with CMEM_NONCACHED configuration in CMEM.



    And, it is OK that ARM and DSP can read from CMEM the data written by IPU, and only the IPU read is not getting the data after 3sec.

    Is there anything to lock IPU after booting?



    Thanks and Best Regards,

    SI.
  • 0 in reply to Sung-IL
    TI__Guru 50170 points
    Hi, Sung-IL,
    Sorry for the slow response. So, it means that the IPU CMEM read is always fail regardless its configuration except in that 3 secs in boot time.
    Has customer verified that there isn't any CMEM region conflicts among DSP and IPU?

    Rex
  • 0 in reply to Rex Chang
    TI__Mastermind 30810 points
    Hi Rex,

    They confirmed there is no conflicts among DSP and IPU.
    Is there examples to read data from IPU in PRSDK?

    Thanks and Best Regards,
    SI.
  • 0 in reply to Sung-IL
    TI__Guru 50170 points
    Hi, Sung-Il,

    I checked with DSP expert, and there isn't any example reading CMEM in IPU.

    Rex