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Linux/TDA2SX: Regarding the DDR3 tool(EMIF tools) which is used to get the initialization values of DDR3

Part Number: TDA2SX
Other Parts Discussed in Thread: DRA742,

Tool/software: Linux

Hii all,

We are presently working on TDA2XX EVM,currently we are using "MT41K512M16" chip for DDR3.Here I'm listing my doubts Regarding the EMIF tools.

1.Now,we are going to change the DDR3 chip for our customized board,So while studying if we changed the DDR3 chip means we need to modify the initialization values and some related information regarding the modified chip need to be specify in u-boot files. Is this is correct??

a) If correct,To get the initialization and calibration values of DDR3 we need some tool,

We gone through this document ,This document is specifying that "EMIF Tools application" is there to get that values.

http://www.ti.com/lit/an/sprac36c/sprac36c.pdf

2.But I didn't understand where the tool is present and how to download it? how to use that tool to configure our DDR3 chip??

Could you please help me to download the tool and Procedure to use the tool to get the initialization and calibration values of DDR3.

3. After Getting the values from the tool in which files of u-boot I need to modify the code??

Thanks & Regards,

A.Kavya Harini

  • Hi Somanath,

    Yes I checked that file.But my question was how to generate that file or generate the DDR3 calibration values using the EMIF application tool mentioned in the sprac36c.pdf.
    Because for our Customized board we are thinking to modify the DDR3 chip,If we modify the chip how I need to configure the DDR3 and how to generate "Register Configuration - Register Values" using EMIF tools.So I need the EMIF tool and after generating the register values of DDR3 in which files of u-boot I need to Modify?Please help me to know the procedure how to use the tool & configure the DDR3 after generating the register values,Because i'm new to DDR3.

    Thanks,
    A.Kavya Harini
  • Hi,

    The tool (.xls file) can be accessed via the .pdf (see the abstract) or at the link below (the zip file):

    www.ti.com/.../litabsmultiplefilelist.tsp

    The link below provides documentation on using the output of the SPRAC36 .xls file and integrating it with u-boot code.

    www.ti.com/.../spraca1.pdf

    Best regards,
    Kevin
  • Hii kevin,

    Thanks for the Information I'll go through these documents and if I have any doubts i'll get back to you.

    Thanks,
    A.kavya harini
  • Hi Kevin,

    I am trying to fill the board details(step:2 or work sheet 2) in the EMIF tool, but I don't know the PCB trace lengths values ,please help me which values I need to fill in that sheet.Please give some input data to fill that board details sheet to generate the values.

    --> I have another doubt also regarding the work sheet :1 nothing but system details.
    In the system details worksheet a)Company / Board Name / Revision (Ex: TI_EVM_revC)-->?
    b)TI SOC Part Number-->?
    Regarding these descriptions what values I need to fill? whether the board name is TI_TDA2xx_EVM or TI_DRA74x_EVM or some thing other. Please help me to fill these details also.

    Please go through the below log while i'm booting our TDA2XX EVM board with 3.04 VISION SDK version images. i'm getting this log.

    U-Boot 2016.05-00010-g9551b3d (May 16 2019 - 11:05:10 +0530)

    CPU : DRA752-GP ES2.0
    Model: TI DRA742
    Board: DRA74x EVM REV H.0
    DRAM: 4 GiB
    MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1

    Please help me to resolve the issue.

    Thanks & Regards,
    A.Kavya Harini
  • Hi Kavya,

    You can examine TDA2EVM's technical documents for board trace length values.

    "DRA74x/DRA75x/TDA2x CPU Board PCB Rev H" has information about board trace length values.

  • Hi Mehmet,

    Thanks for the reply I will go through it once for the trace lengths.

    In the Mean while could you please suggest me,what data I need to put in work sheet-1.

    In the system details worksheet  a)Company / Board Name / Revision (Ex: TI_EVM_revC)-->?
                                                        b)TI SOC Part Number-->?
    Regarding these descriptions what values I need to fill? whether the board name is TI_TDA2xx_EVM or TI_DRA74x_EVM or some thing other. Please help me to fill these details also.

    Please go through the below log while i'm booting our TDA2XX EVM board with 3.04 VISION SDK version images. i'm getting this log.

    U-Boot 2016.05-00010-g9551b3d (May 16 2019 - 11:05:10 +0530)

    CPU : DRA752-GP ES2.0
    Model: TI DRA742
    Board: DRA74x EVM REV H.0
    DRAM: 4 GiB
    MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1

  • Hi,

    The PDF gives a description of how to set the parameters. http://www.ti.com/lit/an/sprac36c/sprac36c.pdf

    Detail 1 from Section 1A is just a unique identifier. You can enter any value you like for this parameter, provided that the characters match the list of valid characters provided in the pdf.

    Detail 2 from Section 1A should match the SOC used in the system. If using a TDA2X EVM, then please select TDA2x as the processor.

    Best regards,
    Kevin

  • Hi Kevin,

    Thanks for the reply.

    I'm able to generate the values for TDA2x for cpu board DRA752-GP ES2.0. So as mentioned  in the "Software Guidelines to EMIF/DDR3 Configuration on DRA7xx Devices pdf" present in the following link.

    http://www.ti.com/lit/an/spraca1/spraca1.pdf

    I generated the values for DDR3 and I compared with the values present in the PDF under section 3.1 what I mentioned in the above link.Those values are matching correctly.(I generated values for chip MT41K512M16)

    1. But I observed some generated values from EMIF tool are differed while filling the structures at u-boot covered at  section 3.2.1Updatethe EMIF1/2DDR3TimingParameters.

    The parameters which are differed from generated values are listed below.

    const struct emif_regs emif1_ddr3_532_mhz_1cs_2G{

    .sdram_config2= 0x08000000                              ///////////////////////////////These are the values differing in EMIF1 structure///////////////////////////////

    .sdram_tim2= 0x30BF7FDA

    .sdram_tim3= 0x427F8BA8

    .zq_config= 0x0007190B

    }

    const struct dmm_lisa_map_regsDRA75x_DDR3L_532MHz_TI_EVM_revG3_dmm_regs= {

    .dmm_lisa_map_2= 0x80640300

    }

    const struct ctrl_ioregs ioregs_dra7xx_es1= {

    .ctrl_lpddr2ch= 0x40404040,

    .ctrl_ddrio_2= 0x84210000,                 ///////////////////////////////////In this structure these values are not generated in the EMIF tool////////////////////////

    .ctrl_emif_sdram_config_ext= 0x0001C1A7,

    .ctrl_emif_sdram_config_ext_final= 0x0001C1A7

    ,.ctrl_ddr_ctrl_ext_0= 0xA2000000,

    }

    In Software Guidelines to EMIF/DDR3 Configuration on DRA7xx Devices pdf & what ever the reference doc for EMIF tool saying to generate the tuning parameters, but the tool is generating only one structure, with that one structure how you are filling this "const struct emif_regs emif2_ddr3_532_mhz_1cs_2G{ }" structure.Those generated values are matching to emif1 structure

    Why these values are differing?What exactly the differed values going to change in the aspect of configuring the DDR3.

    These values are differed in PDF also.

    2. As per my understanding emif1 is configuring to 2GB for two chips of "MT41K512M16" and emif2 is configuring to 2GB for four chips of "MT41K512M8".Is it right?

    if it is right means we need to generate the tuning parameters independently for those two chips correct?

    Please help me to understand the DDR3 parameters tuning.

    Thanks & Regards,

    A.Kavya Harini.

  • Hi,

    1) The values shown in the PDF should be considered as an example, and may or may not reflect the values that should be programmed. 

    2) Leveling is discussed in the TDA2SX TRM: http://www.ti.com/lit/ug/sprui29f/sprui29f.pdf (section 15.3.4.8). Please select "Hardware Leveling" in the EMIF register configuration tool, which should clear the leveling mask bits in register EMIF_DDR_PHY_CONTROL_1.

    Best regards,
    Kevin

  • Hi Kevin,

    Thanks for the reply. I have a small doubt.Could you please clear it.

    1. If we select the hardware leveling, then no need to tune the physical registers(like EMIF_DDR_PHY_CONTROL_1). Is my way of thinking/understanding is correct?

    2. If board trace lengths are modified, then how these register values will be updated, if we select the hardware leveling in EMIF tool.

    Thanks & Regards,

    A.Kavya Harini.

  • Hi,

    The read / write DLL values are programmed in EMIF_EXT_PHY_CONTROL_2 - EMIF_EXT_PHY_CONTROL_21. If hardware leveling is selected, these will be updated by the TI software driver after hardware leveling completes during initialization.

    The trace lengths are used by the .xls to determine an approximate DLL value. 

    Best regards,
    Kevin

  • Hi Kevin,

    Thanks for the Reply. It is very valuable information for us.

    TI software driver--> Is the Ti software driver present in the ROM code or some other specific diver is using as TI software driver?

    I want this information,Because we are going to select the Hardware leveling in our custom board.Please clarify me,that TI software driver is present in ROM code or not?

    Thanks & Regards,

    A.Kavya Harini.

  • Hi Kavya,

    The EMIF configuration is not part of ROM. It is part of SBL available in PDK (part of Processor SDK Vision) or u-boot (Processor SDK Linux Automotive).

    Thanks and Regards,

    Piyali

  • Hi Piyali,

    ==>In the above conversation,"If hardware leveling is selected, these will be updated by the TI software driver after hardware leveling completes during initialization."

    1.Could you please tell me the TI software driver name,if this TI software driver is present in SBL or in u-boot?

    2.In my custom board memory traces are modified , compared to TI EVM.If I select Hardware leveling in EMIF tool whether, TI software driver handles the DLL values?Could you please confirm it.

    Thanks & Regards,

    A.Kavya Harini

  • Hi,

    1. If you use u-boot, section 4 of the following document may be beneficial to review: http://www.ti.com/lit/an/spraca1/spraca1.pd The code which initializes the EMIF and DDR is located at /arch/arm/cpu/armv7/omap-common/emif-common.c
    2. The software in u-boot should trigger hardware training if you select hardware leveling in the EMIF tool. As an example, see lines 371 and 372 from the following link, which checks whether to call function "dra7_ddr3_leveling": http://omapzoom.org/?p=repo/u-boot.git;a=blob;f=arch/arm/cpu/armv7/omap-common/emif-common.c;h=b26984e26c5e8648598a36380d991fb34d1dd3df;hb=5ddd5a8a256713300973cb633e84abf2542aaf94

    Best regards,
    Kevin