This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA2PX /RTOS RGB 565 Interlaced output from LCD3

Part Number: TDA2P

Tool/software: TI-RTOS

Hi All,

We have D0-D15 ,Hsync, Field and Pix clock connected to LCD3 interface of TDA2PX.

I need RGB565 Interlaced output. I tried changing the scan format in chains_common.c  from SYSTEM_SF_PROGRESSIVE to SYSTEM_SF_INTERLACED.

I am getting Assertion from DSS

[IPU1-0] 9.724455 s: DISPLAY: Create in progress !!!
[IPU1-0] 9.724760 s: dispcore/src/vpscore_dss.c @ Line 1412:
[IPU1-0] 9.724852 s: Format(interlaced/progressive) conversion is not supported
[IPU1-0] 9.724943 s: dispdrv/src/vpsdrv_displayCore.c @ Line 304:
[IPU1-0] 9.725065 s: Set DSS parameter failed

Does LCD interface does not support Interlaced data?

Is there any way to output RGB 565 interlaced data from SoC

Currently I am using VSDK 3.05 version.

Regards,

Deepika

  • Hi Deepika,

    You have not passed scan format correctly in IOCTL_VPS_DCTRL_SET_CONFIG.

    Please change scan format to interlaced here and try.

    Regards,

    Rishabh

  • Hi Rishabh,

    Thanks for reply. I have passed the parameter for setting INTERLACED output in the function ChainsCommon_SetDctrlConfig()

    pPrm->deviceId = DISPLAYCTRL_LINK_USE_LCD;
    /* Changing the display port to LCD3 */
    pVInfo->vencId = SYSTEM_DCTRL_DSS_VENC_LCD3; //SYSTEM_DCTRL_DSS_VENC_LCD1
    pVInfo->outputPort = SYSTEM_DCTRL_DSS_DPI3_OUTPUT; //SYSTEM_DCTRL_DSS_DPI1_OUTPUT
    if
    pVInfo->vencOutputInfo.vsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW;
    pVInfo->vencOutputInfo.hsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW;

    /* Below are of dont care for EVM LCD */
    pVInfo->vencOutputInfo.fidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH;
    pVInfo->vencOutputInfo.actVidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH;

    pVInfo->mInfo.standard = SYSTEM_STD_CUSTOM;
    pVInfo->mInfo.width = displayWidth;
    pVInfo->mInfo.height = displayHeight;
    pVInfo->mInfo.scanFormat = SYSTEM_SF_INTERLACED

    I have passed it like this.  This function calls the IOCTL_VPS_DCTRL_SET_CONFIG. Is there any other method to pass the parameters.

    Regards,

    Deepika

  • Hi Deepika,

    Can you do a single step and check.

    Also you use use FVID2 macros while passing parameters to driver IOCTL.

    Regards,

    Rishabh

  • Hi Rishabh,

    While debugging I found that 

    pathCfg->inFmt.scanFormat= 1   --------------pathCfg is the  pointer to VpsCore_DispDssParams

     pathObj->dispScanFormat =0 ------------------ pathObj is the pointer to VpsCore_DssPathObj 

    As these two are not equal I am getting above assertion.

    dispScanFormat =0 specifies Interlaced , Can you please tell me how to set inFmt.scanFormat to 1. 

     I am also checking at my end.

    Regards

    Deepika

  • Hi Deepika,

    Please see IOCTL IOCTL_VPS_DISP_SET_DSS_PARAMS.

    Vps_DispDssParams has inFmt where you need to set scanFormat.

    Regards,

    Rishabh

  • Hi Deepika,

    Is this issue resolved now?

    Regards,

    Rishabh

  • Hi Rishabh,

    Thanks for your reply.

    With pObj->DisplayPrm.displayScanFormat = FVID2_SF_INTERLACED;  (Here  pObj --use case Object)

    we were able to set Interlaced output from display.Now the problem is that I need the data output from LCD3 interface to be BGR565i.

    Internally YUV420_SP is set.When we change this value to BGR565 we get assertion.

    My query is related to the thread https://e2e.ti.com/support/processors/f/791/t/803192

    This thread is still open.I need RGB 565i to input to ADV7393 Encoder.

    Regards,

    Deepika

  • Hi Deepika,

    Please mark the appropriate posts as "This resolved my issue" and close the thread,

    Kindly follow up on the ADV issue in other thread.

    Regards,

    Rishabh

  • Hi,

    Thanks a lot Rishabh for your reply.

    Regards,

    Deepika