• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 97 subscribers
  • Views 355 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

TMS320DM8168: DM8168

TMS320DM8168: dm8168

Shyama S
Intellectual 340 points

Part Number: TMS320DM8168

Hi,

I was going through the EVM of DM8168 and has a doubt regarding NAND booting. Please clarify it.

As per the datasheet to select NAND booting, setting BTMODE[3:0] is enough, which can be set via SW3 on EVM.  But in EVM SW4 is also used to select NAND booting.

Actually, in EVM based on SW4(active low) input, AH7 pin of dm8168 is connected to the 9th pin /CE of NAND Flash via a 74CBTLV1G125CR (Lo-Vltg Single FET Bus Sw).

My doubt is if i can connect AH7 pin of dm8168 is to the 9th pin /CE of NAND and then by setting BTMODE[3:0] i can select NAND booting. In this way i can remove 74CBTLV1G125CR.

Actually i am not understanding the necessity of 74CBTLV1G125CR.

Please help me out with this..

Regards,

Shyama

  • 0
    TI__Guru**** 170625 points

    Hi Shyama,

    Beside BTMODE[3:0] sysboot pins, for NAND boot you will also need some GPMC pins, refer to DM816x TRM, ch 25 ROM Code, section 25.7.3.2 Pins Used

    You will see there all GPMC pins needed for NAND boot, and GPMC_CS[0]n is one of these.

    On DM816x TI EVM, GPMC_CS[0]n is enabled with SW4 position 1 - 4 NAND_BOOTn. Refer to the DM816x EVM user guide (evm816x_TechRef_RevG.pdf), section 3.4.4 SW4, On Board Memory Enable Switch

    Regards,
    Pavel

  • 0
    TI__Guru**** 170625 points

    Shyama S said:

    My doubt is if i can connect AH7 pin of dm8168 is to the 9th pin /CE of NAND and then by setting BTMODE[3:0] i can select NAND booting. In this way i can remove 74CBTLV1G125CR.

    Actually i am not understanding the necessity of 74CBTLV1G125CR.

    NAND and NOR/XIP boot is using the same GPMC_CS[0]n pin on DM816x TI EVM, this is the reason of necessity of 74CBTLV1G125CR. If you are not planning to use NOR boot, you can remove 74CBTLV1G125CR.

    NAND chip is located at DM816x EVM base board, whike NOR chip is located at DM816x EVM daughter board and is also using 74CBTLV1G125CR.

    Regards,
    Pavel