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Original question:

AM335x 4-bit ECC NAND booting issue

Linux/AM3359: NAND boot issue

user5032636
Prodigy 170 points

Part Number: AM3359

Tool/software: Linux

Hi Biser

I  am also confused by this question,my  board with the same NAND (S34ML04G2) as mentioned above.\

My SYSBOOT9 = 0 selecting the ECC  done by ROM，what wrong with this choice？Is that space area of ROM is not enough for ECC？

Hope for your help.

Thank you

  • 0
    TI__Guru**** 393215 points

    Hi,

    This NAND must be flashed with BCH-16 ECC correction. It has 128 byte spare area and the ROM code will expect BCH-16 when reading from it.

  • 0 in reply to Biser Gatchev-XID
    Prodigy 170 points

    Hi Biser

    Thank you for your clear answer.I want to know more about it.

    What is the process of  ECC handled by NAND？

    What is the process of  ECC done by ROM？

    For ECC done by ROM,the ROM CODE initialize the GPMC，then GPMC read the parameters  of nand .The BCH is  automatically calculated  by the GPMC on reading each 5120-byte sector .Is that mean  

    ROM code get the BCH computed by GPMC and compare against the BCH stored in the spare area for the corresponding  page？

    What is the difference between ECC done by ROM and ECC handled by NAND？

  • 0 in reply to user5032636
    TI__Guru**** 393215 points

    user5032636 said:
    ROM code get the BCH computed by GPMC and compare against the BCH stored in the spare area for the corresponding  page？

    Yes, this is correct.

    user5032636 said:
    What is the difference between ECC done by ROM and ECC handled by NAND？

    ECC done by ROM code is the exactly the above procedure: for each 512 byte sector the ELM module inside the GPMC calculates the ECC and compares against the value stored in the spare area for this sector.

    ECC done by NAND means that the ECC correction is done internally in the NAND, and the ROM code simply reads the 512 byte sector without doing any ECC. Not all NAND memories support this feature though.