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AM5728: DSP interrupt latency

Part Number: AM5728
Other Parts Discussed in Thread: SYSBIOS

Hallo,

I have a bare metal motion application on C66_1 and C66_2. The processing performance is outstanding (a bunch of complex calculations are done in less than 1.3 µs).
But I noticed breaks within the processing flow. When I searched for the reason I found an unexpected long interrupt latency on C66. So I write a very simple test:

  main
  {
    while( 1 )
    {
      set pin high
      set pin low
    }
  }

On scope I can see the pin toggling with a pulse with of 50 ns. Now I implemented period timer with interrupt like this:

  Init_Timer4( 1 ms );
 
  // Register Timer4 interrupts on to INTC
  {
    const uint32_t XBarInstSysTimer = CSL_XBAR_INST_DSP1_IRQ_32;
    const uint32_t SysTimerIntC66 = 32;

    CSL_xbarIrqConfigure( CSL_XBAR_IRQ_CPU_ID_DSP1, XBarInstSysTimer, CSL_XBAR_TIMER4_IRQ );
    Intc_IntRegister( SysTimerIntC66, SysTimer_Handler, NULL);
    Intc_IntPrioritySet( SysTimerIntC66, 1, 0);
    Intc_SystemEnable( SysTimerIntC66 );
  }
 
  void SysTimer_Handler( void *handle )
  {
    HWREG( SOC_TIMER4_BASE + TIMER_IRQSTATUS) = TIMER_IRQSTATUS_OVF_IT_FLAG_MASK;
    SysTicks++;
  }

On scope I still see my pin toggeling with 20 MHz, but each one millisecond there is a large gap.
This is the time where the C66 is hanging out in the timer interrupt.
According to the documentation I expected this gap shall 300 to 500 ns.
But the time where the main loop is inactive is nearly 4 microseconds long!
I also measured the time of execution of SysTimer_Handler(), but this is very short (below 100 ns).

It seems the C66 has an interrupt latency of nearly 4 µs instead of some 100 nano seconds.
I could not believe it and double checked my measurements. But I can not found any fault.

How long is the interrupt latency of the C66?
What is going wrong?

Please note:
C66 is running directly from internal SRAM (not from OCMC and not from DDR3). Clock is 600 MHz.
The really good processing performance proof it is not a memory access or clock problem.

What should be done to reduce the interrupt latency significat?

Regards Dirk

  • Hi,

    Do you use -O3 to optimize the C66x code? What kinds of code for the test? baremetal or SYSBIOS? For the timer 4 every 1ms, how do you measure the interrupt latency? from which point to point? Was GPIO pin is used to determine the start and end of timer interrupt, I need some details.

    Regards, Eric

  • Hello Eric,

    >> Do you use -O3 to optimize the C66x code?
    I rebuild my test code with optimization level -O3

    >> What kinds of code for the test? baremetal or SYSBIOS?
    Bare metal, see code attached below.

    >> Was GPIO pin is used to determine the start and end of timer interrupt, I need some details
    GPIO3_13 is used. Please see below for more details.

    >> For the timer 4 every 1ms, how do you measure the interrupt latency? from which point to point?
    I measured from main stops working (toggeling stops) to main resumes working (toggeling resumes).
    Please see at my detailed description and scope shots below.

    On step 1 of reproduction the entire test code is the following:

    int main( void )
    {
      EnableModuleClock( SOC_GPIO3_BASE );

      HWREG( SOC_GPIO3_BASE + GPIO_OE) &= ~(1 << 13);
      HWREG( CSL_MPU_CORE_PAD_IO_REGISTERS_REGS + CSL_CONTROL_CORE_PAD_IO_PAD_VIN1A_D9 ) = 0x00000000 | // direction = OUT
                                                                                           0x00000000 | // slew  = FAST
                                                                                           0x00000000 | // WkUp = OFF
                                                                                           0x00000000 | // pull = NONE
                                                                                           14;          // fnct = GPIO

      while( 1 )
      {
        HWREG( SOC_GPIO3_BASE + GPIO_SETDATAOUT)   = 1 << 13;
        HWREG( SOC_GPIO3_BASE + GPIO_CLEARDATAOUT) = 1 << 13;
      }
    }

    As result you can see on scope at pad VIN1AD9 (ball AG2) a endless level toggeling with 60 ns period (30 ns each toggle).

    No gap or interrupt of this process can be detected. Everything is perfect.

    See also the assembler code of the main loop:

  • On step 2 of reproduction you may install a timer. At my new example I installed timer 3 with 1 ms period.

    static void SysTimerInit( void )
    //----------------------------------------------------------------------------
    /*!
    \brief   Initialize the system timer to generate a 1 ms systick counter
    */
    //----------------------------------------------------------------------------
    {
      const uint32_t InstAddr = SOC_TIMER3_BASE;

      EnableModuleClock( InstAddr );

      // enable soft reset
      HWREG( InstAddr + TIMER_TSICR ) &= ~TIMER_TSICR_SFT_MASK;

      // reset the module
      HWREG( InstAddr + TIMER_TIOCP_CFG ) |= TIMER_TIOCP_CFG_SOFTRESET_MASK;
      while( (HWREG( InstAddr + TIMER_TIOCP_CFG ) & TIMER_TIOCP_CFG_SOFTRESET_MASK) > 0U ) { }

      // Write to the EMUFREE field of TIOCP_CFG
      HW_WR_FIELD32( InstAddr + TIMER_TIOCP_CFG, TIMER_TIOCP_CFG_EMUFREE, TIMER_FREE );

      const uint32_t Freq = 1000U;
      const uint32_t v = 0xFFFFFFFFU - (sys::TIMER3_GFCLK / Freq);
      HWREG( InstAddr + TIMER_TLDR ) = v;
      HWREG( InstAddr + TIMER_TCRR ) = v;

      // post enable
      HWREG( InstAddr + TIMER_TSICR ) |= TIMER_TSICR_POSTED_MASK;

      // enable the timer, since we just came out of reset, we do not need post polling
      HWREG( InstAddr + TIMER_TCLR ) |= TIMER_TCLR_ST_MASK | TIMER_TCLR_AR_MASK;

      // poll write posting for transition into operational mode
      while( HWREG( InstAddr + TIMER_TWPS) > 0U ) { }

      // enable overflow interrupt
      HWREG( InstAddr + TIMER_IRQSTATUS) = TIMER_IRQSTATUS_OVF_IT_FLAG_MASK;
      HWREG( InstAddr + TIMER_IRQENABLE_SET) = TIMER_IRQENABLE_SET_OVF_EN_FLAG_MASK;

      // Register Timer interrupt on to INTC
      {
        const uint32_t XBarInstSysTimer = CSL_XBAR_INST_DSP2_IRQ_32;
        const uint32_t SysTimerIntC66 = 32;

        CSL_xbarIrqConfigure( CSL_XBAR_IRQ_CPU_ID_DSP2, XBarInstSysTimer, CSL_XBAR_TIMER3_IRQ );

        Intc_IntRegister( SysTimerIntC66, SysTimer_Handler, NULL);
        Intc_IntPrioritySet( SysTimerIntC66, 1, 0);
        Intc_SystemEnable( SysTimerIntC66 );
      }
    }

    extern void SysTimer_Handler( void *handle )
    //----------------------------------------------------------------------------
    /*!
    \brief   Timer 4 IRQ handler
    */
    //----------------------------------------------------------------------------
    {
      HWREG( SOC_TIMER3_BASE + TIMER_IRQSTATUS) = TIMER_IRQSTATUS_OVF_IT_FLAG_MASK;
      SysTicks++;
    }

    Here is the assembler code of the timer 3 ISR:



    Now you can clearly see at the scope a gap within the main loop execution, that has been appeared.
    And it is repeated exactly each 1 ms.
    This gap is the time where the main loop is not executed, because it is interrupted by the only interrupt in the system (timer 3 ISR).
    Perfect so far.

    But this gap is 3.8 micro seconds. That is a very long time for a 600 MHz DSP.
    According to the target configuration scripts (see AM57x_PRCM_Clock_GetConfig) there is no doubt that the DSP is working on 600 MHz and no cache miss or DDR3 access can happen. The DSP is running from its local fast SRAM.
    So what is the DSP doing?

  • On step 3 of reproduction you may install a second GPIO (I used GPIO3_25) to measure the ISR execution time of the short timer 3 ISR.
    The result looks like this on scope. The interrupt execution time is only 60 ns. That matches to the asm code.

    Around the interrupt ISR execution is a dead band of nearly 3800 ns where neither the ISR nor the main loop is executed.
    This are in other words 2200 cycles.

    Previously I thougth this is only IRQ latency (time from exiting main to entering ISR), but now I see a part of this time is also burned after the ISR.

    I can not deal with such a long interrupt overhead.
    Where is it coming from?
    How to eliminate this overhead?

  • Hi,

    I am checking and let you know.

    Regards, Eric

  • Hi Dirk,

    I'll try to help resolve this issue.

    Are you executing software on any other cores besides your test program on one of the DSPs?

    Are you directly loading the program via JTAG?

    Regards,
    Frank

  • Hi Frank,

    no other core is running. No A15 core, no second DSP and no IPU.

    The entire SOC (especially PRCM) is configured with the target configuration scripts for the IDK_AM572X.

    The library C:\ti\pdk_am57xx_1_0_14\packages\ti\csl\lib\am572x\c66\release\ti.csl.ae66 is linked.

    I load the software directly via JTAG (XDS110) into the DSP local memory.  Here is the linker script:

    -stack  0x800                            /* SOFTWARE STACK SIZE           */
    -heap   0x400                            /* HEAP AREA SIZE                */


    MEMORY
    {
      VTBL:      org = 0x00800000  len = 0x0800       /* Memory assigned for vector table */
      L2SRAM:    org = end(VTBL)   len = 0x00048000 - size(VTBL)
      L1P:       org = 0x00E00000  len = 0x00008000
      L1D:       org = 0x00F00000  len = 0x00008000
    }


    SECTIONS
    {
      .vects        > VTBL
      .l2_int       > VTBL
      .text:_c_int00 : ALIGN(1024) > L2SRAM
      .text         > L2SRAM   // code
      .bss          > L2SRAM   // uninitialized or zero initialized global and static variables
      .const        > L2SRAM   // global constants
      .data         > L2SRAM   // initialized global and static variables
      .switch       > L2SRAM
      .far          > L2SRAM
      .cinit        > L2SRAM
      .init_array   > L2SRAM
      .neardata     > L2SRAM
      .fardata      > L2SRAM
      .rodata       > L2SRAM

      .sysmem       > L2SRAM          // heap
      .stack        > L2SRAM (HIGH)   // software system stack
    }

    Regards Dirk

  • Hi Dirk,

    Thanks for the additional details. I'll start work on trying to reproduce this behavior. I think I should have some results in the next day or two.

    Thanks for your patience.

    Regards,
    Frank

  • Dirk,

    This is taking a bit long than expected, but I'm still looking at this issue. I'll keep you posted on my progress.

    Regards,
    Frank

  • Dirk,

    Sorry for the delayed response. I was able to reproduce the issue you observe. Please see below for a logic analyzer capture. In this capture, the timer ISR time is about 3.8. usec.

    I don't yet have proof, but I suspect the problem is with the CSL interrupt handler. Are you including the library file pdk_am57xx_1_0_15/packages/ti/csl/lib/am572x/c66/release/ti.csl.ae66? I've attached my .map file for your reference.

    We can check whether the CSL interrupt handler is causing the issue by updating the CSL library to directly plug your interrupt handler. Please see this E2E thread for details:

    Regards,
    Frank

    ******************************************************************************
                   TMS320C6x Linker PC v8.3.2                      
    ******************************************************************************
    >> Linked Fri Nov  1 18:47:58 2019
    
    OUTPUT FILE NAME:   <dsp_intr_latency.out>
    ENTRY POINT SYMBOL: "_c_int00"  address: 00803800
    
    
    MEMORY CONFIGURATION
    
             name            origin    length      used     unused   attr    fill
    ----------------------  --------  ---------  --------  --------  ----  --------
      VTBL                  00800000   00000800  00000400  00000400  RWIX
      L2SRAM                00800800   00047800  00003694  0004416c  RWIX
      L1P                   00e00000   00008000  00000000  00008000  RWIX
      L1D                   00f00000   00008000  00000000  00008000  RWIX
    
    
    SEGMENT ALLOCATION MAP
    
    run origin  load origin   length   init length attrs members
    ----------  ----------- ---------- ----------- ----- -------
    00800000    00800000    00000200   00000000    rw-
      00800000    00800000    00000200   00000000    rw- .l2_int
    00800400    00800400    00000200   00000000    rw-
      00800400    00800400    00000200   00000000    rw- .vects
    00800800    00800800    00002900   00002900    r-x
      00800800    00800800    00002900   00002900    r-x .text
    00803100    00803100    00000454   00000000    rw-
      00803100    00803100    00000240   00000000    rw- .far
      00803340    00803340    00000214   00000000    rw- .fardata
    00803554    00803554    0000004c   0000004c    r--
      00803554    00803554    0000004c   0000004c    r-- .switch
    008035a0    008035a0    00000004   00000000    rw-
      008035a0    008035a0    00000004   00000000    rw- .neardata
    008035a8    008035a8    00000070   00000070    r--
      008035a8    008035a8    00000070   00000070    r-- .cinit
    00803800    00803800    00000080   00000080    r-x
      00803800    00803800    00000080   00000080    r-x .text:_c_int00
    00847800    00847800    00000800   00000000    rw-
      00847800    00847800    00000800   00000000    rw- .stack
    
    
    SECTION ALLOCATION MAP
    
     output                                  attributes/
    section   page    origin      length       input sections
    --------  ----  ----------  ----------   ----------------
    .l2_int    0    00800000    00000200     UNINITIALIZED
                      00800000    00000200     ti.csl.ae66 : interrupt.oe66 (.l2_int)
    
    .vects     0    00800400    00000200     UNINITIALIZED
                      00800400    00000200     ti.csl.ae66 : interrupt.oe66 (.vects)
    
    .text      0    00800800    00002900     
                      00800800    000005c0     ti.csl.ae66 : csl_device_xbar.oe66 (.text:CSL_xbarIrqConfigure)
                      00800dc0    000003c0                 : interrupt.oe66 (.text:Intc_Init)
                      00801180    00000340                 : interrupt.oe66 (.text:INTH_IRQHandler)
                      008014c0    000001e0     main.obj (.text)
                      008016a0    00000140     ti.csl.ae66 : interrupt.oe66 (.text:INTH_L1IRQ10Handler)
                      008017e0    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ11Handler)
                      00801920    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ12Handler)
                      00801a60    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ13Handler)
                      00801ba0    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ14Handler)
                      00801ce0    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ15Handler)
                      00801e20    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ4Handler)
                      00801f60    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ5Handler)
                      008020a0    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ6Handler)
                      008021e0    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ7Handler)
                      00802320    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ8Handler)
                      00802460    00000140                 : interrupt.oe66 (.text:INTH_L1IRQ9Handler)
                      008025a0    00000100     rts6600_elf.lib : copy_decompress_rle.c.obj (.text:__TI_decompress_rle_core)
                      008026a0    000000e0     ti.csl.ae66 : interrupt.oe66 (.text:Intc_IntRegister)
                      00802780    000000e0     rts6600_elf.lib : exit.c.obj (.text:exit)
                      00802860    000000e0                     : memset.c.obj (.text:memset)
                      00802940    000000e0     ti.csl.ae66 : interrupt.oe66 (.text:scanCombined$0)
                      00802a20    000000c0                 : interrupt.oe66 (.text:NmiHandler)
                      00802ae0    000000c0     rts6600_elf.lib : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit:__TI_auto_init_nobinit_nopinit)
                      00802ba0    000000c0     ti.csl.ae66 : intvecs.oe66 (.text:_init_regs)
                      00802c60    000000c0     rts6600_elf.lib : tls.c.obj (.text:tls:init:__TI_tls_init)
                      00802d20    000000a0                     : memcpy64.asm.obj (.text:memcpy)
                      00802dc0    00000080     ti.csl.ae66 : timer.oe66 (.text:TIMEREnable)
                      00802e40    00000060                 : dsp_wugen.oe66 (.text:DSP_WUGEN_IRQ_Enable)
                      00802ea0    00000060                 : interrupt.oe66 (.text:Intc_IntInstallIrqHandler$0)
                      00802f00    00000040                 : csl_device_common.oe66 (.text:CSL_unlockMmrLock2)
                      00802f40    00000040                 : interrupt.oe66 (.text:Intc_SystemEnable)
                      00802f80    00000040     rts6600_elf.lib : args_main.c.obj (.text:_args_main)
                      00802fc0    00000020     ti.csl.ae66 : csl_device_common.oe66 (.text:CSL_lockMmrLock2)
                      00802fe0    00000020                 : dsp_wugen.oe66 (.text:DSP_WUGEN_IRQ_DisableAll)
                      00803000    00000020                 : gpio_v2.oe66 (.text:GPIOModuleEnable)
                      00803020    00000020                 : interrupt.oe66 (.text:Intc_IntPrioritySet)
                      00803040    00000020                 : timer.oe66 (.text:TIMERWritePostedStatusGet)
                      00803060    00000020     rts6600_elf.lib : startup.c.obj (.text:_system_post_cinit)
                      00803080    00000020                     : pre_init.c.obj (.text:_system_pre_init)
                      008030a0    00000020                     : exit.c.obj (.text:abort)
                      008030c0    00000020                     : copy_decompress_none.c.obj (.text:decompress:none:__TI_decompress_none)
                      008030e0    00000020                     : copy_decompress_rle.c.obj (.text:decompress:rle24:__TI_decompress_rle24)
    
    .far       0    00803100    00000240     UNINITIALIZED
                      00803100    00000200     ti.csl.ae66 : interrupt.oe66 (.far:inth_IrqCount$0)
                      00803300    00000040     (.common:INTH_intRouting)
    
    .fardata   0    00803340    00000214     UNINITIALIZED
                      00803340    00000200     ti.csl.ae66 : interrupt.oe66 (.fardata:argArray)
                      00803540    0000000c     rts6600_elf.lib : exit.c.obj (.fardata)
                      0080354c    00000008     ti.csl.ae66 : interrupt.oe66 (.fardata:gL1IrqQ1Handler)
    
    .text:_c_int00 
    *          0    00803800    00000080     
                      00803800    00000080     rts6600_elf.lib : boot.c.obj (.text:_c_int00)
    
    .switch    0    00803554    0000004c     
                      00803554    0000002c     ti.csl.ae66 : csl_device_xbar.oe66 (.switch:CSL_xbarIrqConfigure)
                      00803580    00000020                 : interrupt.oe66 (.switch:INTH_IRQHandler)
    
    .cinit     0    008035a8    00000070     
                      008035a8    0000000f     (.cinit..fardata.load) [load image, compression = rle]
                      008035b7    0000000b     (.cinit..far.load) [load image, compression = rle]
                      008035c2    0000000b     (.cinit..l2_int.load) [load image, compression = rle]
                      008035cd    0000000b     (.cinit..vects.load) [load image, compression = rle]
                      008035d8    00000009     (.cinit..neardata.load) [load image, compression = rle]
                      008035e1    00000003     --HOLE-- [fill = 0]
                      008035e4    00000008     (__TI_handler_table)
                      008035ec    00000004     --HOLE-- [fill = 0]
                      008035f0    00000028     (__TI_cinit_table)
    
    .init_array 
    *          0    00800800    00000000     UNINITIALIZED
    
    .neardata 
    *          0    008035a0    00000004     UNINITIALIZED
                      008035a0    00000004     main.obj (.neardata)
    
    .stack     0    00847800    00000800     UNINITIALIZED
                      00847800    00000008     rts6600_elf.lib : boot.c.obj (.stack)
                      00847808    000007f8     --HOLE--
    
    MODULE SUMMARY
    
           Module                       code    ro data   rw data
           ------                       ----    -------   -------
        .\
           main.obj                     480     0         4      
        +--+----------------------------+-------+---------+---------+
           Total:                       480     0         4      
                                                                 
        C:\ti\ccs901\ccs\tools\compiler\ti-cgt-c6000_8.3.2\lib\rts6600_elf.lib
           copy_decompress_rle.c.obj    288     0         0      
           exit.c.obj                   256     0         12     
           memset.c.obj                 224     0         0      
           autoinit.c.obj               192     0         0      
           tls.c.obj                    192     0         0      
           memcpy64.asm.obj             160     0         0      
           boot.c.obj                   128     0         0      
           args_main.c.obj              64      0         0      
           copy_decompress_none.c.obj   32      0         0      
           pre_init.c.obj               32      0         0      
           startup.c.obj                32      0         0      
        +--+----------------------------+-------+---------+---------+
           Total:                       1600    0         12     
                                                                 
        R:/pdk_am57xx_1_0_15/packages/ti/csl/lib/am572x/c66/release/ti.csl.ae66
           interrupt.oe66               6464    32        2120   
           csl_device_xbar.oe66         1472    44        0      
           intvecs.oe66                 192     0         0      
           timer.oe66                   160     0         0      
           dsp_wugen.oe66               128     0         0      
           csl_device_common.oe66       96      0         0      
           gpio_v2.oe66                 32      0         0      
        +--+----------------------------+-------+---------+---------+
           Total:                       8544    76        2120   
                                                                 
           Stack:                       0       0         2048   
           Linker Generated:            0       105       0      
        +--+----------------------------+-------+---------+---------+
           Grand Total:                 10624   181       4184   
    
    
    LINKER GENERATED COPY TABLES
    
    __TI_cinit_table @ 008035f0 records: 5, size/record: 8, table size: 40
    	.fardata: load addr=008035a8, load size=0000000f bytes, run addr=00803340, run size=00000214 bytes, compression=rle
    	.far: load addr=008035b7, load size=0000000b bytes, run addr=00803100, run size=00000240 bytes, compression=rle
    	.l2_int: load addr=008035c2, load size=0000000b bytes, run addr=00800000, run size=00000200 bytes, compression=rle
    	.vects: load addr=008035cd, load size=0000000b bytes, run addr=00800400, run size=00000200 bytes, compression=rle
    	.neardata: load addr=008035d8, load size=00000009 bytes, run addr=008035a0, run size=00000004 bytes, compression=rle
    
    
    LINKER GENERATED HANDLER TABLE
    
    __TI_handler_table @ 008035e4 records: 2, size/record: 4, table size: 8
    	index: 0, handler: __TI_decompress_rle24
    	index: 1, handler: __TI_decompress_none
    
    
    GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 
    
    address   name                           
    -------   ----                           
    008030a0  C$$EXIT                        
    00802fc0  CSL_lockMmrLock2               
    00802f00  CSL_unlockMmrLock2             
    00800800  CSL_xbarIrqConfigure           
    00802fe0  DSP_WUGEN_IRQ_DisableAll       
    00802e40  DSP_WUGEN_IRQ_Enable           
    00802fe0  DSP_WUGEN_IRQ_Init             
    00803000  GPIOModuleEnable               
    00801180  INTH_IRQHandler                
    008016a0  INTH_L1IRQ10Handler            
    008017e0  INTH_L1IRQ11Handler            
    00801920  INTH_L1IRQ12Handler            
    00801a60  INTH_L1IRQ13Handler            
    00801ba0  INTH_L1IRQ14Handler            
    00801ce0  INTH_L1IRQ15Handler            
    00801e20  INTH_L1IRQ4Handler             
    00801f60  INTH_L1IRQ5Handler             
    008020a0  INTH_L1IRQ6Handler             
    008021e0  INTH_L1IRQ7Handler             
    00802320  INTH_L1IRQ8Handler             
    00802460  INTH_L1IRQ9Handler             
    00803300  INTH_intRouting                
    00802c54  INT_SetWaitForInterrupt        
    00800dc0  Intc_Init                      
    00803020  Intc_IntPrioritySet            
    008026a0  Intc_IntRegister               
    00802f40  Intc_SystemEnable              
    00802a20  NmiHandler                     
    008035a0  SysTicks                       
    00801660  SysTimer_Handler               
    00802dc0  TIMEREnable                    
    00803040  TIMERWritePostedStatusGet      
    00800400  __ISR_Table                    
    008035f0  __TI_CINIT_Base                
    00803618  __TI_CINIT_Limit               
    008035e4  __TI_Handler_Table_Base        
    008035ec  __TI_Handler_Table_Limit       
    00848000  __TI_STACK_END                 
    00000800  __TI_STACK_SIZE                
    008035a0  __TI_STATIC_BASE               
    UNDEFED   __TI_TLS_INIT_Base             
    UNDEFED   __TI_TLS_INIT_Limit            
    00802ae0  __TI_auto_init_nobinit_nopinit 
    00803540  __TI_cleanup_ptr               
    008030c0  __TI_decompress_none           
    008030e0  __TI_decompress_rle24          
    00803544  __TI_dtors_ptr                 
    00803548  __TI_enable_exit_profile_output
    ffffffff  __TI_pprof_out_hndl            
    ffffffff  __TI_prof_data_size            
    ffffffff  __TI_prof_data_start           
    00802c60  __TI_tls_init                  
    ffffffff  __binit__                      
    ffffffff  __c_args__                     
    00802f80  _args_main                     
    00803800  _c_int00                       
    00847800  _stack                         
    00803060  _system_post_cinit             
    00803080  _system_pre_init               
    008030a0  abort                          
    00803340  argArray                       
    ffffffff  binit                          
    00802780  exit                           
    0080354c  gL1IrqQ1Handler                
    00802ba0  init_regs                      
    00800000  inth_IrqHandler                
    008015f8  main                           
    00802d20  memcpy                         
    00802860  memset                         
    
    
    GLOBAL SYMBOLS: SORTED BY Symbol Address 
    
    address   name                           
    -------   ----                           
    00000800  __TI_STACK_SIZE                
    00800000  inth_IrqHandler                
    00800400  __ISR_Table                    
    00800800  CSL_xbarIrqConfigure           
    00800dc0  Intc_Init                      
    00801180  INTH_IRQHandler                
    008015f8  main                           
    00801660  SysTimer_Handler               
    008016a0  INTH_L1IRQ10Handler            
    008017e0  INTH_L1IRQ11Handler            
    00801920  INTH_L1IRQ12Handler            
    00801a60  INTH_L1IRQ13Handler            
    00801ba0  INTH_L1IRQ14Handler            
    00801ce0  INTH_L1IRQ15Handler            
    00801e20  INTH_L1IRQ4Handler             
    00801f60  INTH_L1IRQ5Handler             
    008020a0  INTH_L1IRQ6Handler             
    008021e0  INTH_L1IRQ7Handler             
    00802320  INTH_L1IRQ8Handler             
    00802460  INTH_L1IRQ9Handler             
    008026a0  Intc_IntRegister               
    00802780  exit                           
    00802860  memset                         
    00802a20  NmiHandler                     
    00802ae0  __TI_auto_init_nobinit_nopinit 
    00802ba0  init_regs                      
    00802c54  INT_SetWaitForInterrupt        
    00802c60  __TI_tls_init                  
    00802d20  memcpy                         
    00802dc0  TIMEREnable                    
    00802e40  DSP_WUGEN_IRQ_Enable           
    00802f00  CSL_unlockMmrLock2             
    00802f40  Intc_SystemEnable              
    00802f80  _args_main                     
    00802fc0  CSL_lockMmrLock2               
    00802fe0  DSP_WUGEN_IRQ_DisableAll       
    00802fe0  DSP_WUGEN_IRQ_Init             
    00803000  GPIOModuleEnable               
    00803020  Intc_IntPrioritySet            
    00803040  TIMERWritePostedStatusGet      
    00803060  _system_post_cinit             
    00803080  _system_pre_init               
    008030a0  C$$EXIT                        
    008030a0  abort                          
    008030c0  __TI_decompress_none           
    008030e0  __TI_decompress_rle24          
    00803300  INTH_intRouting                
    00803340  argArray                       
    00803540  __TI_cleanup_ptr               
    00803544  __TI_dtors_ptr                 
    00803548  __TI_enable_exit_profile_output
    0080354c  gL1IrqQ1Handler                
    008035a0  SysTicks                       
    008035a0  __TI_STATIC_BASE               
    008035e4  __TI_Handler_Table_Base        
    008035ec  __TI_Handler_Table_Limit       
    008035f0  __TI_CINIT_Base                
    00803618  __TI_CINIT_Limit               
    00803800  _c_int00                       
    00847800  _stack                         
    00848000  __TI_STACK_END                 
    ffffffff  __TI_pprof_out_hndl            
    ffffffff  __TI_prof_data_size            
    ffffffff  __TI_prof_data_start           
    ffffffff  __binit__                      
    ffffffff  __c_args__                     
    ffffffff  binit                          
    UNDEFED   __TI_TLS_INIT_Base             
    UNDEFED   __TI_TLS_INIT_Limit            
    
    [69 symbols]
    

  • Hello Frank,

    thank you very much for reproducing my issue.

    >> Are you including the library file pdk_am57xx_1_0_15/packages/ti/csl/lib/am572x/c66/release/ti.csl.ae66?

    Yes, as reported above I use the library C:\ti\pdk_am57xx_1_0_14\packages\ti\csl\lib\am572x\c66\release\ti.csl.ae66.

    >> I don't yet have proof, but I suspect the problem is with the CSL interrupt handler.

    I'am pretty sure the problem is within the CSL interrupt handler.

    I will follow the E2E thread you found. The problem described there is the same and I will reproduce the solution from this thread.

    I guess this will solve my problem.

    Thank you very much for your great support.

    Regards Dirk.