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TMS320C5535: AER AEC Quick Tuning

Part Number: TMS320C5535

Hello,

we want to build an intercom unit with the C5535 DSP. We are using http://software-dl.ti.com/libs/aer/latest/index_FDS.html algorithms for echo cancellation in handsfree mode. We use agc of aic3254 codec and not agc of aer library. We don't use drc, hlc and equalizer. Now we started tuning of parameters as mentioned in the quick tuning guide. In the first step  of chapter 5 "Convergence verification", the y2x_delay parameter should be set to 0. But this is not possible, since the parameter must be positive as mentioned in the header file. The aerControl() function reports error aer_ERR_INVALIDPAR when setting the parameter to 0. So we set the parameter to 1. The output of aerGetPerformance() shows values of 0 or 1 for max_canc_l2  and and curr_canc_l2 and coherence_state has a value of 1. When we set y2x_delay to 40, the values of max_canc_l2  and and curr_canc_l2 are between 5 and 8. The coherence_state is first 0 and then changes to 1 and stays at 1. So there is no real convergence, right?! We already adjusted gains by approximation and removed dc offset from mic input data via high pass filter. Does it make sense to continue with chapter 6 "Main NLP parameter tuning"? Our main goal is echo cancellation. Second goal is to achieve as much as full duplex performance as possible. We are already working with the hardware/housing of the end product.  We can access raw data of txout path (only every second sample due to bandwidth limitations) and performance data from aerGetPerformance() function. Additionally we can access filter coefficient info from aerGetfilter() function. What is the best approach for tuning the parameters?

Tanks in advance

Marc

  • Hi,

    Please take a look at the following FAQ:

    Best Regards,
    Yordan

  • Hi,

    thanks for your answer. Your colleague Jianzhong knows the aer/aec algorithms quite well and offered some help here. Perhaps he could take a look at my questions. First question is, why can't y2x_delay be set to 0 as mentioned in quick tuning guide? Second question is, why doesn't the system converge with y2x_delay = 1?

    Have a nice day

    Marc

  • Hi Marc,

    y2x_delay can be set to 0 through aerOpen(). Apparently aerControl() doesn't take 0 value, but that's not a big deal. Setting it to 1 has almost same effect. 

    Your system not converging with y2x_delay as 1 may be due to too many leading 0's in the tail model. Please refer to section 7.1 of the quick tuning guide. 

    When you set y2x_delay to 40, you saw max_canc_l2 and curr_canc_l2 between 5 and 8. That means there was convergence of 15 to 24dB. Are you able to capture the send path signal as described in section 5.1? If the send path output signal looks like figure 5 when AER is enabled but NLP is disabled, then you have confidence that your system is converging.  

    Regards,

    Jianzhong

  • Hi,

    thanks for our response. I did some measurements as described in the Quick tuning guide in chapter 5 "Convergence verification".

    The AER instantiation and parameters are shown here:

    Int16 aerAlgo_Create()
    {
        tint num_bufs_req_by_aer;
        const ecomemBuffer_t *bufs_req_by_aer;
        ecomemBuffer_t bufs_aloc_by_siu[SIU_NUM_AER_BUFFS];
        aerCreateConfig_t aer_create_cfg;
        aerSizeConfig_t aer_size_cfg;
        aerNewConfig_t aer_new_cfg;
    
        aer_create_cfg.config_bitfield = 0x0;
        aer_create_cfg.debugInfo = NULL;   // todo: set callback
        aer_create_cfg.eventOut = NULL;    // todo: set callback
        aer_create_cfg.max_sampling_rate = aer_SRATE_16K;
    
        aerError = aerCreate(&aer_create_cfg);
        if (aerError != aer_NOERR)
        {
            return aerError;
        }
    
        // Call aerGetSizes() to get memory requirements
        aer_size_cfg.max_tail_length = 1600;
        aer_size_cfg.max_y2x_delay = 80;
        aer_size_cfg.config_bitfield = aer_SIZE_FDNLP_REQ; /* use FDNLP for HF */
    
        aerError = aerGetSizes(&num_bufs_req_by_aer, &bufs_req_by_aer,
                               &aer_size_cfg);
        if (aerError != aer_NOERR)
        {
            return aerError;
        }
    
        printf("AER required buffers for hands free:\n");
        printBufferUsage(bufs_req_by_aer, num_bufs_req_by_aer);
    
        // Create instance for handsfree
        // allocate memory according to the requirements returned by aerGetSizes()
        aerError = allocAerBuffers(bufs_req_by_aer, bufs_aloc_by_siu,
                                   num_bufs_req_by_aer, aer_PHM_HF, 0,
                                   FALSE);
    
        if (aerError != aer_NOERR)
        {
            return aerError;
        }
    
        printf("Buffers allocated for hands-free AER:\n");
        printBufferUsage(bufs_aloc_by_siu, num_bufs_req_by_aer);
    
        // Call aerNew() to create instance
        aer_new_cfg.handle = NULL; // todo: id which is passed to dbg and event callbacks -> see aer_create_cfg
        //aer_new_cfg.handle = (void *) siuMakeID(
        //        (SIU_MID_AER | AER_HF0_ID), 0);
        aer_new_cfg.sizeCfg = aer_size_cfg;
        aerInst = NULL;
        aerError = aerNew(&aerInst, num_bufs_req_by_aer, bufs_aloc_by_siu,
                          &aer_new_cfg);
        if (aerError != aer_NOERR)
        {
            return aerError;
        }
    
        return aer_NOERR;
    }
    
    Int16 aerAlgo_Open()
    {
        aerConfig_t aerCfg;
    
        aerCfg.y2x_delay = 40;
        aerCfg.srate_bitfield = aer_SRATE_RXIN_16K | aer_SRATE_TXOUT_16K
                | aer_SRATE_RXOUT_TXIN_16K;
        aerCfg.tail_length = 800;
        aerCfg.delay_tx_ag_chg = 160;  // für agc adaption
        aerCfg.delay_rx_ag_chg = 160;  // für agc adaption
        aerCfg.num_samp_interp = 5;    // für agc adaption
        aerCfg.phone_mode = aer_PHM_HF;
        aerCfg.reset_bitfield = aer_RESET_FULL;
        aerCfg.valid_bitfield = aer_CFG_VALID_BITS_ALL_1;
    
        aerError = aerOpen(aerInst, &aerCfg);
        if (aerError != aer_NOERR)
        {
            return aerError;
        }
    
        aerError = aerActivate(aerInst, NULL); // todo: needed????
        if (aerError != aer_NOERR)
        {
            return aerError;
        }
    
        return aer_NOERR;
    
    }
    
    Int16 aerAlgo_ConfigParams()
    {
    
        /* valid bitfield 0 */
        aer_ctl.valid_bitfield_0 = aer_CTL_VALID0_MODES_CTL0
                | aer_CTL_VALID0_MODES_CTL1 | aer_CTL_VALID0_MODES_CTL2
                | aer_CTL_VALID0_Y2X_DELAY | aer_CTL_VALID0_SAMPLING_RATES
                | aer_CTL_VALID0_TAIL_LENGTH | aer_CTL_VALID0_TX_AG_CHG_DELAY
                | aer_CTL_VALID0_RX_AG_CHG_DELAY | aer_CTL_VALID0_TX_AG_CHG_INTERP
                | aer_CTL_VALID0_PHONE_MODE | aer_CTL_VALID0_RX_ANALOG
                | aer_CTL_VALID0_TX_ANALOG | aer_CTL_VALID0_RX_DIGITAL
                | aer_CTL_VALID0_TX_DIGITAL | aer_CTL_VALID0_RX_EQ_PARAMS
                | aer_CTL_VALID0_TX_EQ_PARAMS;
    
        aer_ctl.modes_0.mask = 0xffff;
        aer_ctl.modes_0.value = 0x008F;                            // default 0x0086
        aer_ctl.modes_1.mask = 0xffff;
        aer_ctl.modes_1.value = 0x0000;                            // default 0x0000
        aer_ctl.modes_2.mask = 0xffff;
        aer_ctl.modes_2.value = 0x0000;                            // default 0x0000
    
        aer_ctl.y2x_delay = 40;                                      // no default
    
        aer_ctl.srate_bitfield = aer_SRATE_RXIN_16K | aer_SRATE_TXOUT_16K // no default
                | aer_SRATE_RXOUT_TXIN_16K;
        aer_ctl.tail_length = 800; /* 800 = 100msec/125usec */       // no default
        aer_ctl.delay_tx_ag_chg = 160;                               // no default
        aer_ctl.delay_rx_ag_chg = 160;                               // no default
        aer_ctl.num_samp_interp = 5;                                 // no default
        aer_ctl.phone_mode = aer_PHM_HF;                             // no default
        aer_ctl.gain_rx_analog = 0;                                  // no default
        aer_ctl.gain_tx_analog = 0;                                  // no default
        aer_ctl.gain_rx_digital = 0;                                 // default 0
        aer_ctl.gain_tx_digital = 0;                                 // default 0
        aer_ctl.rxeq_params = (aerEqConfig_t *) &sampleEqBqParamsRx; // no default
        aer_ctl.txeq_params = (aerEqConfig_t *) &sampleEqBqParamsTx; // no default
    
        /* valid bitfield 1 */
        aer_ctl.valid_bitfield_1 = aer_CTL_VALID1_NLP_CLOSS_TARGET
                | aer_CTL_VALID1_NLP_TX_CLIPAGG
                | aer_CTL_VALID1_NLP_LINATTN_MAX_ERLE
                | aer_CTL_VALID1_NLP_CLIPPER_MAX_ERLE
                | aer_CTL_VALID1_NLP_TOTAL_LINATTN_MIN
                | aer_CTL_VALID1_NLP_RX_LINATTN_MIN
                | aer_CTL_VALID1_NLP_RX_LINATTN_MAX
                | aer_CTL_VALID1_NLP_TX_LINATTN_MIN
                | aer_CTL_VALID1_NLP_TX_LINATTN_MAX | aer_CTL_VALID1_NLP_TX_IN_TC
                | aer_CTL_VALID1_NLP_TX_OUT_TC | aer_CTL_VALID1_NLP_RX_IN_TC
                | aer_CTL_VALID1_NLP_RX_OUT_TC | aer_CTL_VALID1_GAIN_SPLIT_TC
                | aer_CTL_VALID1_CNG_RX_LEVEL | aer_CTL_VALID1_CNG_TX_LEVEL;
        aer_ctl.nlp_combloss_target = 327;                          // default 327
        aer_ctl.nlp_clip_agg_l2 = 7;                                // default 7
        aer_ctl.nlp_linattn_max_erle = 21;                          // default 21
        aer_ctl.nlp_clipper_max_erle = 21;                          // default 21
        aer_ctl.nlp_total_linattn_min = 0;                          // default 0
        aer_ctl.nlp_rx_linattn_min = 0;                             // default 0
        aer_ctl.nlp_rx_linattn_max = 32767;                         // default 32767
        aer_ctl.nlp_tx_linattn_min = 0;                             // default 0
        aer_ctl.nlp_tx_linattn_max = 32767;                         // default 32767
        aer_ctl.nlp_tx_in_tc = 1;                                   // default 1
        aer_ctl.nlp_tx_out_tc = 1;                                  // default 1
        aer_ctl.nlp_rx_in_tc = 1;                                   // default 1
        aer_ctl.nlp_rx_out_tc = 1;                                  // default 1
        aer_ctl.gain_split_tc = 5;                                  // default 5
        aer_ctl.cng_rx_level = -65;                                 // default -65
        aer_ctl.cng_tx_level = -65;                                 // default -65
    
        /* valid bitfield 2 */
        aer_ctl.valid_bitfield_2 = aer_CTL_VALID2_TX_FDNLP_MSEC_DELAY
                | aer_CTL_VALID2_TX_FDNLP_BIN_LO1 | aer_CTL_VALID2_TX_FDNLP_BIN_LO2
                | aer_CTL_VALID2_TX_FDNLP_BIN_HI1 | aer_CTL_VALID2_TX_FDNLP_BIN_HI2
                | aer_CTL_VALID2_TX_FDNLP_CNG_MAX | aer_CTL_VALID2_NR_FBIN1_LIM
                | aer_CTL_VALID2_NR_FBIN2_LIM | aer_CTL_VALID2_NR_FBAND1_MAX_ATTEN
                | aer_CTL_VALID2_NR_FBAND2_MAX_ATTEN
                | aer_CTL_VALID2_NR_FBAND3_MAX_ATTEN
                | aer_CTL_VALID2_NR_SIG_UPD_RATE_MAX
                | aer_CTL_VALID2_NR_SIG_UPD_RATE_MIN
                | aer_CTL_VALID2_NR_NOISE_THRESH | aer_CTL_VALID2_NR_NOISE_HANGOVER;
    
        aer_ctl.txfdnlp_msec_delay = 5;                           // default 5
        aer_ctl.txfdnlp_bin_lo1 = 1;                              // default 1
        aer_ctl.txfdnlp_bin_lo2 = 6;                              // default 6
        aer_ctl.txfdnlp_bin_hi1 = 56;                             // default 56
        aer_ctl.txfdnlp_bin_hi2 = 60;                             // default 60
        aer_ctl.txfdnlp_cng_max = -60;                            // default -60
        aer_ctl.nr_fbin1_lim = 10;                                // default 10
        aer_ctl.nr_fbin2_lim = 32;                                // default 32
        aer_ctl.nr_fband1_max_atten = 9;                          // default 9
        aer_ctl.nr_fband2_max_atten = 9;                          // default 9
        aer_ctl.nr_fband3_max_atten = 9;                          // default 9
        aer_ctl.nr_sig_upd_rate_max = 31129;                      // default 31129
        aer_ctl.nr_sig_upd_rate_min = 29818;                      // default 29818
        aer_ctl.nr_noise_thresh = -75;                            // default -75
        aer_ctl.nr_noise_hangover = 150;                          // default 150
    
        /* valid bitfield 3 */
        aer_ctl.valid_bitfield_3 = aer_CTL_VALID3_COH_HANGOVER
                | aer_CTL_VALID3_COH_RATIO_THRESH | aer_CTL_VALID3_COH_CNT_THRESH
                | aer_CTL_VALID3_HLC_THRESHOLD | aer_CTL_VALID3_HLC_RAMP_OUT_TC
                | aer_CTL_VALID3_HLC_POWER_TC | aer_CTL_VALID3_THRESH_RX_NLD
                | aer_CTL_VALID3_THRESH_NOISE_RX | aer_CTL_VALID3_THRESH_NOISE_TX
                | aer_CTL_VALID3_HANGOVER_RXTOTX | aer_CTL_VALID3_HANGOVER_TXTORX
                | aer_CTL_VALID3_TX_SLIM_MODE | aer_CTL_VALID3_RX_SLIM_MODE
                | aer_CTL_VALID3_NG_HANGOVER | aer_CTL_VALID3_NG_RAMPIN_PERIOD
                | aer_CTL_VALID3_NG_NOISE_LEVEL;
        aer_ctl.coh_hangover = 600;                               // default 600
        aer_ctl.coh_ratio_thresh = 6554;                          // default 6554
        aer_ctl.coh_cnt_thresh = 30;                              // default 30
        aer_ctl.thresh_hlc = 0;                                   // default 0
        aer_ctl.ramp_out_tc_hlc = 700;                            // default 700
        aer_ctl.power_tc_hlc = 1;                                 // default 1
        aer_ctl.thresh_rx_nld = 32000;                            // default 32000
        aer_ctl.thresh_rx_noise = 5380;                           // default 5380
        aer_ctl.thresh_tx_noise = 5380;                           // default 5380
        aer_ctl.hangover_rx_to_tx = 30;                           // default 30
        aer_ctl.hangover_tx_to_rx = 10;                           // default 10
        aer_ctl.tx_slim_mode = 0;                                 // default 0
        aer_ctl.rx_slim_mode = 0;                                 // default 0
        aer_ctl.hangover_ng = 1000;                               // default 1000
        aer_ctl.rampin_period_ng = 800;                           // default  800
        aer_ctl.noise_level_ng = -75;                             // default -75
    
        /*== AER valid bitfield 4 ==*/
        aer_ctl.valid_bitfield_4 = aer_CTL_VALID4_DT_THRESH
                | aer_CTL_VALID4_CLIP_SCALE | aer_CTL_VALID4_DT_HANGOVER;
        aer_ctl.dt_thresh = 96;                                   // default 96
        aer_ctl.clip_scale_curve = 0x28404080;                 // default 0x28404080
        aer_ctl.dt_hangover = 10;                                 // default 10
    
        aerError = aerControl(aerInst, &aer_ctl);
        if (aerError != aer_NOERR)
        {
            return aerError;
        }
    
        return aer_NOERR;
    
    } /* aer_sim_test_api */

    The following command sequence was executed and the raw data of send out was captured.

    // Set volout
    dp:volout 50

    // Set y2x_delay to xxx
    dp:aerpdez 3 xxx

    // Drop high band tx/rx, FDNLP On
    dp:aerphex 1 0xFFFFC040

    // Disable aer, nlp, cng tx/rx
    dp:aerphex 0 0xFFFF0088

    // Play sample 1
    dp:simmod 1

    // Enable aer
    dp:aerphex 0 0xFFFF00AB

    dp:aerphex <aa> <bb>

    aa: Parameter ID (0=Modes 0 Bitfield, 1 = Modes 1 Bitfield,....)

    bb: Upper 16 Bits=Mask, Lower 16 Bits=Value

    The send out data for different y2x_delay's looks like this:

    Corresponding AER Debug data is here:

    y2x_delay=1:

    DP:State: 0
    DP:Max Erle: 0
    DP:Curr Erle: 0
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 0
    DP:Curr Erle: 0
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 0
    DP:Curr Erle: -1
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 0
    DP:Curr Erle: 0
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 0
    DP:Curr Erle: 0
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 0
    DP:Curr Erle: 0
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 0
    DP:Curr Erle: -1
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 0
    DP:Curr Erle: 0
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 0
    DP:Curr Erle: 0
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 0
    DP:Curr Erle: 0
    DP:Nlp linear att: 3668
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 0
    DP:Curr Erle: 0
    DP:Nlp linear att: 3668

    y2x_delay=40:

    DP:State: 0
    DP:Max Erle: 8
    DP:Curr Erle: 7
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 8
    DP:Curr Erle: 7
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 8
    DP:Curr Erle: 7
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 8
    DP:Curr Erle: 8
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 9
    DP:Curr Erle: 8
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 9
    DP:Curr Erle: 8
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 9
    DP:Curr Erle: 8
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 9
    DP:Curr Erle: 9
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 9
    DP:Curr Erle: 8
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 9
    DP:Curr Erle: 8
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 9
    DP:Curr Erle: 9
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 9
    DP:Curr Erle: 8
    DP:Nlp linear att: 7368
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 9
    DP:Curr Erle: 9
    DP:Nlp linear att: 7368

    y2x_delay=80:

    DP:State: 0
    DP:Max Erle: 7
    DP:Curr Erle: 7
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 7
    DP:Curr Erle: 7
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 7
    DP:Curr Erle: 6
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 7
    DP:Curr Erle: 5
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 0
    DP:Max Erle: 7
    DP:Curr Erle: 6
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 7
    DP:Curr Erle: 5
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 7
    DP:Curr Erle: 6
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 7
    DP:Curr Erle: 7
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 7
    DP:Curr Erle: 6
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 7
    DP:Curr Erle: 6
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 7
    DP:Curr Erle: 6
    DP:Nlp linear att: 5201
    dp:aerstat?
    DP:State: 1
    DP:Max Erle: 7
    DP:Curr Erle: 7
    DP:Nlp linear att: 5201

    Questions:

    1. Is the main instantiation and parameter init ok (see AER_Parameters.txt)?

    2. Is this a good starting point for going on to chapter 6 "Main Nlp Parameters Tuning"? We could start with y2x_delay=40?!

    3. Why does coherence state of aer debug data start with 0 and then switch to 1 and stay at 1 (see Stats.txt files)?!

    4. What does parameter nlp linear attenuation in aer debug data mean (see Stats.txt files)?

    Thanks for your efforts

    Marc

  • Marc,

    Please see my response below:

    1. Is the main instantiation and parameter init ok (see AER_Parameters.txt)?

    The default value of "nlp_combloss_target" is meant to have heavy attenuation. Since your convergence looks good, you should increase it to e.g.  8192 (12dB attenuation). Please refer to API documentation regarding this parameter. 

    2. Is this a good starting point for going on to chapter 6 "Main Nlp Parameters Tuning"? We could start with y2x_delay=40?!

    Yes. 

    3. Why does coherence state of aer debug data start with 0 and then switch to 1 and stay at 1 (see Stats.txt files)?!

    This means it is looking for coherence event which is usually caused by echo path change, e.g. moving the phone. 

    4. What does parameter nlp linear attenuation in aer debug data mean (see Stats.txt files)?

    Please refer to documentation of parameter "nlp_combloss_target". 

    Regards,

    Jianzhong

  • Hi,

    we tried different settings of nlp_combloss_target and nlp_clip_agg_l2. We never hear an echo, even if we set nlp_combloss_target =32767 and nlp_clip_agg_l2=-10. Instead of we always have half duplex performance. E.g. when we start speaking near end, far end speech is suppressed. We only can hear far end speech when we stop speaking near end. How can we increase full duplex and decrease attenuation by nlp? We already tried to disable nlp completely by setting bit 2 of control bitfield 0 to 0. Then we have massive echo. Is there another way to reduce attenuation of nlp?

    At the moment when there is silence, sometimes we hear noise and sometimes it is cut off. We tried to enable comfort noise by setting bit 11 and 12 of control bitfield 0 to 1, but this had no effect. Also setting bit 8 of control bitfield 1 to 1 had no effect. Perhaps there is an adjustable threshhold for noise which could be increased, so that the speaker signal is switched off when signal is below that level?

    Thanks

    Marc

  • First question is already answered. Mic gain was ok for the internally generated test signal (output via speaker), but too high for real input signals. So the signal was saturated and coherence was not possible. So nlp made max. attenuation.  When using lower mic gain, echo can be adjusted via nlp_combloss_target and nlp_clip_agg_l2. Consider this first question as closed.

  • Hi Marc,

    I'm glad you figured out the root cause of the first problem. Regarding the second one, are you using frequency-domain NLP (bit aer_CTL1_USE_FDNLP)? If not, setting bit aer_CTL1_CNG_ADAPT has no effect. Another thing is, if you use FDNLP, you can disable ASNR (bit aer_CTL1_ENABLE_NR) to isolate the problem. Parameters that impact comfort noise level are: cng_rx_level, cng_tx_level, txfdnlp_cng_max. Please refer to API documentation for detailed information. 

    Regards,

    Jianzhong

  • Hi Jianzhong,

    thanks for your response. At the moment we have activated agc of the aic3254 codec. You told us that it is possible to use this agc instead of the aer agc software routines. As you already mentioned, aer has to be informed about pga gain changes via aer_CTL_VALID0_TX_ANALOG. Since we don't know the time when the AIC3254 agc changes the pga gain, we poll the actual pga gain. Every change in pga gain is reported to aer.

    1. When AIC3254 agc changes pga gain very quickly, we cannot report every change to aer. At the moment we poll the pga gain before processing of a data block (10ms). But thus we cannot react on changes of pga gain during read in of the data block. Is this ok?

    2. We remember the old value of the pga gain and report the difference between the new pga gain and the old pga gain to aer. Is this the right way? Or should we report absolute values?

    Thanks in advance

    Marc