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Original question:

AM3352: Board bringup issues

AM3352: DDR3 routing

Pranesh Balekai
Prodigy 20 points
Part Number: AM3352

Hi, 

We have been trying to follow the datasheet for DDR3 routing and it appears that the suggestion is to route the DQ and DQS of the same byte group to be routed in the same layer. 
However, the reference design from http://www.ti.com/tool/TMDSSK3358 seems to be routed across different layers. We were just wondering if we have interpreted the guidelines correctly, or if routing across different layers violates the specifications.

Any help with this regard is appreciated. 

Thanks
Pranesh