AM3352: MMC timings

Chris Zhao1

Part Number: AM3352

Hi experts,

I have one board designed with am335x and emmc, while I got the error as shown below. So I made some measurement to check the timing between clock and CMD line. It looks like in low speed, the response from device is driven in the falling edge of clock, while in high speed mode, the response from device is driven in the rising edge.

1) Is the waveform for high speed mode correct? I checked am335x datasheet, page 221, the setup and hold time should be 4.1ns/3.76ns separately.

2) If it's not correct, is there any timing parameter I can set to fix this problem?

For low speed (about 400kHz), for the response from emmc, the rising edge of clock is in the middle of CMD line, copied below.

During transferring data, the emmc will be in high speed mode, I copied a response (command 13) below.

Thanks

Chris

over 4 years ago

0 Andreas Dannenberg over 4 years ago

TI__Guru 57986 points

Hi Chris,

which eMMC device are you using?

Have you used this particular device successfully in another project?

Can you share your U-Boot and DTS files, a full boot log, and the portion of your schematic showing the connections between the AM335x and the eMMC device?

Also, what is the output of doing 'mmc info' in U-Boot?

I'd like us to double-check a couple of basics first; will dig into the timing diagram you provided next and provide some feedback on that probably tomorrow.

Regards, Andreas

0 Andreas Dannenberg over 4 years ago in reply to Andreas Dannenberg

TI__Guru 57986 points

Chris,

also can you try to build and run a Kernel with CONFIG_MMC_DEBUG enabled?

This might provide helpful hints, as there have been some interesting instances where the delays introduced through the extra debug prints will actually allow the MMC transactions to work. At any rate, this may provide some additional data points.

Regards, Andreas

0 peaves over 4 years ago in reply to Andreas Dannenberg

TI__Guru 58165 points

Your observations are correct. The DAT and CMD outputs can be selected to change on the falling or rising edge of CLK with the HSPE bit. Typically the falling edge of CLK is used for lower transfer speeds and the rising edge of clock is used for faster transfer speeds. This bit is the only programmable control you have over timing.

You are correct with respect to data sheet setup/hold values. However, these setup/hold values represent AM335x input requirements. The AM335x DAT/CMD outputs should change within the range defined by the data sheet min/max output delays defined in Tables 7-92 and 7-93.

Your PCB designer should have done a timing analysis during layout using timing parameters from the AM335x and attached device data sheets along with PCB trace delays to confirm timing was met. If there was a timing issue, PCB trace delays should have been adjusted to resolve all timing issue before the PCB was fabricated.

Regards,
Paul

0 Chris Zhao1 over 4 years ago in reply to Andreas Dannenberg

Expert 1240 points

Hi Andreas,

Thanks for helping.

MPN for emmc is MTFC2GMDEA-0M WT, and this is the 3rd kind of board using this part, previous two kinds should be working fine.

I attached my schematic and log below, "mmc info" will give me nothing. By the way, dts file will be used by linux only, is that right?

As for CONFIG_MMC_DEBUG, I need help from firmware engineer, not tried yet.

for schematic:

For boot log:

Nov7_board-5.log

U-Boot SPL 2017.01-svn1601 (Nov 03 2019 - 10:46:32)
Trying to boot from SPI


U-Boot 2017.01-svn1601 (Nov 03 2019 - 10:46:32 -0800)

CPU  : AM335X-GP rev 2.1
I2C:   ready
DRAM:  256 MiB
Reseting GPMC block, please wait...
GPMC block is ready - for programming
GPMC programming CS_0 for random rd/wr access
GPMC programming CS_1 for burst rd/wr access
GPMC programming CS_2 for random rd/wr access
GPMC programming CS_3 for burst rd/wr access

U-Boot SPL 2017.01-svn1601 (Nov 03 2019 - 10:46:32)
Trying to boot from SPI


U-Boot 2017.01-svn1601 (Nov 03 2019 - 10:46:32 -0800)

CPU  : AM335X-GP rev 2.1
I2C:   ready
DRAM:  256 MiB
Reseting GPMC block, please wait...
GPMC block is ready - for programming
GPMC programming CS_0 for random rd/wr access
GPMC programming CS_1 for burst rd/wr access
GPMC programming CS_2 for random rd/wr access
GPMC programming CS_3 for burst rd/wr access
OMAP SD/MMC: 0, OMAP SD/MMC: 1
** Bad device mmc 0 **
eMMC was not prepared, preparing eMMC, please wait - it may take 6 minutes
MMC Device -1 not found
no mmc device at slot ffffffff
MMC:   SF: Detected mx25l25635f with page size 256 Bytes, erase size 64 KiB, total 32 MiB
Net:   *********** phy_dev_name=cpsw
cpsw
Hit any key to stop autoboot:  5  4  3  2  1  0 
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
BOOTP broadcast 5
BOOTP broadcast 6
BOOTP broadcast 7
BOOTP broadcast 8
BOOTP broadcast 9
BOOTP broadcast 10
BOOTP broadcast 11
BOOTP broadcast 12
BOOTP broadcast 13
BOOTP broadcast 14
BOOTP broadcast 15
BOOTP broadcast 16
BOOTP broadcast 17
BOOTP broadcast 18
BOOTP broadcast 19
BOOTP broadcast 20
BOOTP broadcast 21
BOOTP broadcast 22
BOOTP broadcast 23
BOOTP broadcast 24
BOOTP broadcast 25
BOOTP broadcast 26
BOOTP broadcast 27
BOOTP broadcast 28
BOOTP broadcast 29

Retry time exceeded; starting again
SF: Detected mx25l25635f with page size 256 Bytes, erase size 64 KiB, total 32 MiB
Saving Environment to SPI Flash...
SF: Detected mx25l25635f with page size 256 Bytes, erase size 64 KiB, total 32 MiB
Erasing SPI flash...Writing to SPI flash...done
Valid environment: 2
Saving Environment to SPI Flash...
Erasing SPI flash...Writing to SPI flash...done
Valid environment: 1
OMAP SD/MMC: 0
OMAP SD/MMC: 1
SF: Detected mx25l25635f with page size 256 Bytes, erase size 64 KiB, total 32 MiB
device 0 offset 0x100000, size 0xf00000
SF: 15728640 bytes @ 0x100000 Read: OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.14.40r670-g4796173fc5 (dmehta@gold5) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #424 PREEMPT Sun Nov 3 10:51:04 PST 2019
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] OF: fdt: Machine model: TI AM335x EVM
[    0.000000] Memory policy: Data cache writeback
[    0.000000] efi: Getting EFI parameters from FDT:
[    0.000000] efi: UEFI not found.
[    0.000000] cma: Reserved 48 MiB at 0x8d000000
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] AM335X ES2.1 (neon)
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 64960
[    0.000000] Kernel command line: console=ttyO0,115200n8 root=/
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Memory: 193244K/262144K available (7168K kernel code, 283K rwdata, 1968K rodata, 7168K init, 252K bss, 19748K reserved, 49152K cma-reserved, 0K highmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xd0800000 - 0xff800000   ( 752 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xd0000000   ( 256 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc0800000   (8160 kB)
[    0.000000]       .init : 0xc0a00000 - 0xc1100000   (7168 kB)
[    0.000000]       .data : 0xc1100000 - 0xc1146d28   ( 284 kB)
[    0.000000]        .bss : 0xc1146d28 - 0xc1185f94   ( 253 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] Preemptible hierarchical RCU implementation.
[    0.000000] 	Tasks RCU enabled.
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
[    0.000000] OMAP clockevent source: timer2 at 25000000 Hz
[    0.000014] sched_clock: 32 bits at 25MHz, resolution 40ns, wraps every 85899345900ns
[    0.000035] clocksource: timer1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 76450417870 ns
[    0.000046] OMAP clocksource: timer1 at 25000000 Hz
[    0.000223] timer_probe: no matching timers found
[    0.000442] Console: colour dummy device 80x30
[    0.000470] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
[    0.000477] This ensures that you still see kernel messages. Please
[    0.000483] update your kernel commandline.
[    0.000515] Calibrating delay loop... 795.44 BogoMIPS (lpj=3977216)
[    0.089137] pid_max: default: 32768 minimum: 301
[    0.089331] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.089347] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.090152] CPU: Testing write buffer coherency: ok
[    0.090898] Setting up static identity map for 0x80100000 - 0x80100060
[    0.091055] Hierarchical SRCU implementation.
[    0.091397] EFI services will not be available.
[    0.092775] devtmpfs: initialized
[    0.100899] random: get_random_u32 called from bucket_table_alloc+0x8c/0x1ac with crng_init=0
[    0.101330] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.101649] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.101673] futex hash table entries: 256 (order: -1, 3072 bytes)
[    0.105451] pinctrl core: initialized pinctrl subsystem
[    0.106230] DMI not present or invalid.
[    0.106658] NET: Registered protocol family 16
[    0.108941] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.122813] omap_hwmod: debugss: _wait_target_disable failed
[    0.177608] omap_hwmod: cpgmac0: _wait_target_disable failed
[    0.178716] cpuidle: using governor ladder
[    0.178754] cpuidle: using governor menu
[    0.183301] OMAP GPIO hardware version 0.1
[    0.192175] omap-gpmc 50000000.gpmc: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_gpmc_pins, deferring probe
[    0.194800] No ATAGs?
[    0.194817] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.207807] edma 49000000.edma: TI EDMA DMA engine driver
[    0.208649] v3v3c_reg: supplied by vbat
[    0.208988] vdd5_reg: supplied by vbat
[    0.210302] vgaarb: loaded
[    0.211001] omap_i2c 44e0b000.i2c: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c0_pins, deferring probe
[    0.211068] omap_i2c 4802a000.i2c: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c1_pins, deferring probe
[    0.211264] pps_core: LinuxPPS API ver. 1 registered
[    0.211274] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.211298] PTP clock support registered
[    0.211334] EDAC MC: Ver: 3.0.0
[    0.211731] dmi: Firmware registration failed.
[    0.212153] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
[    0.213382] clocksource: Switched to clocksource timer1
[    0.221913] NET: Registered protocol family 2
[    0.222674] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    0.222711] TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
[    0.222740] TCP: Hash tables configured (established 2048 bind 2048)
[    0.222851] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.222872] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.223034] NET: Registered protocol family 1
[    0.223565] RPC: Registered named UNIX socket transport module.
[    0.223580] RPC: Registered udp transport module.
[    0.223588] RPC: Registered tcp transport module.
[    0.223595] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.791605] hw perfevents: no interrupt-affinity property for /pmu, guessing.
[    0.791752] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counters available
[    0.793736] workingset: timestamp_bits=14 max_order=16 bucket_order=2
[    0.798382] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.799215] NFS: Registering the id_resolver key type
[    0.799264] Key type id_resolver registered
[    0.799273] Key type id_legacy registered
[    0.799322] ntfs: driver 2.1.32 [Flags: R/O].
[    0.801392] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
[    0.801414] io scheduler noop registered
[    0.801424] io scheduler deadline registered
[    0.801663] io scheduler cfq registered (default)
[    0.801676] io scheduler mq-deadline registered
[    0.801685] io scheduler kyber registered
[    0.802968] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568
[    0.855448] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled
[    0.858617] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 30, base_baud = 3000000) is a 8250
[    1.496079] console [ttyS0] enabled
[    1.501522] omap_rng 48310000.rng: Random Number Generator ver. 20
[    1.517918] brd: module loaded
[    1.528219] loop: module loaded
[    1.537143] libphy: Fixed MDIO Bus: probed
[    1.613464] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1000000
[    1.621166] davinci_mdio 4a101000.mdio: detected phy mask fffffffe
[    1.631358] libphy: 4a101000.mdio: probed
[    1.635555] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver unknown
[    1.644493] cpsw 4a100000.ethernet: Detected MACID = 04:79:b7:07:70:9a
[    1.651157] cpsw 4a100000.ethernet: initialized cpsw ale version 1.4
[    1.657704] cpsw 4a100000.ethernet: ALE Table size 1024
[    1.663004] cpsw 4a100000.ethernet: cpts: overflow check period 500 (jiffies)
[    1.672865] omap_rtc 44e3e000.rtc: registered as rtc0
[    1.678230] i2c /dev entries driver
[    1.682107] IR NEC protocol handler initialized
[    1.686714] IR RC5(x/sz) protocol handler initialized
[    1.691787] IR RC6 protocol handler initialized
[    1.696348] IR JVC protocol handler initialized
[    1.700896] IR Sony protocol handler initialized
[    1.705543] IR SANYO protocol handler initialized
[    1.710264] IR Sharp protocol handler initialized
[    1.714999] IR MCE Keyboard/mouse protocol handler initialized
[    1.720855] IR XMP protocol handler initialized
[    1.727188] cpuidle: enable-method property 'ti,am3352' found operations
[    1.737124] omap_hwmod: cpgmac0: _wait_target_disable failed
[    1.743270] sdhci: Secure Digital Host Controller Interface driver
[    1.749578] sdhci: Copyright(c) Pierre Ossman
[    1.815434] sdhci-pltfm: SDHCI platform and OF driver helper
[    1.826459] ledtrig-cpu: registered to indicate activity on CPUs
[    1.839074] NET: Registered protocol family 10
[    1.845233] Segment Routing with IPv6
[    1.848998] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    1.855772] NET: Registered protocol family 17
[    1.860346] Key type dns_resolver registered
[    1.864952] omap_voltage_late_init: Voltage driver support not added
[    1.877125] omap-gpmc 50000000.gpmc: GPMC revision 6.0
[    1.882956] gpmc_read_settings_dt: page/burst-length set but not used!
[    1.889894] gpmc cs0 before gpmc_cs_program_settings:
[    1.895056] cs0 GPMC_CS_CONFIG1: 0x2a641001
[    1.899286] cs0 GPMC_CS_CONFIG2: 0x000a1002
[    1.903552] cs0 GPMC_CS_CONFIG3: 0x00060604
[    1.907786] cs0 GPMC_CS_CONFIG4: 0x0a08100e
[    1.912057] cs0 GPMC_CS_CONFIG5: 0x020f0a10
[    1.916306] mmc0: switch to bus width 4 failed
[    1.920834] mmc0: new high speed MMC card at address 0001
[    1.926282] cs0 GPMC_CS_CONFIG6: 0x88070282
[    1.926286] gpmc cs0 access configuration:
[    1.926293] gpmc,mux-add-data = <0>;
[    1.926296] gpmc,device-width = <2>;
[    1.926299] gpmc,wait-pin = <0>;
[    1.926303] gpmc,wait-on-write = <1>;
[    1.926306] gpmc,wait-on-read = <1>;
[    1.926310] gpmc,burst-length = <4>;
[    1.926314] gpmc,sync-write = <1>;
[    1.926318] gpmc,gpmc,sync-read = <1>;
[    1.926325] gpmc,cycle2cycle-samecsen = <1>;
[    1.926328] gpmc cs0 timings configuration:
[    1.926337] gpmc,cs-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926344] gpmc,cs-rd-off-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.926350] gpmc,cs-wr-off-ns = <100>; /* 91 ns - 100 ns; 10 ticks */
[    1.926356] gpmc,adv-on-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.926362] gpmc,adv-rd-off-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.926368] gpmc,adv-wr-off-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.926374] gpmc,adv-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926380] gpmc,adv-aad-mux-rd-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926385] gpmc,adv-aad-mux-wr-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926391] gpmc,oe-on-ns = <140>; /* 131 ns - 140 ns; 14 ticks */
[    1.926397] gpmc,oe-off-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.926403] gpmc,oe-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926409] gpmc,oe-aad-mux-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926415] gpmc,we-on-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.926421] gpmc,we-off-ns = <100>; /* 91 ns - 100 ns; 10 ticks */
[    1.926426] gpmc,rd-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.926432] gpmc,wr-cycle-ns = <100>; /* 91 ns - 100 ns; 10 ticks */
[    1.926438] gpmc,access-ns = <150>; /* 141 ns - 150 ns; 15 ticks */
[    1.926445] gpmc,page-burst-access-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926451] gpmc,bus-turnaround-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926456] gpmc,cycle2cycle-delay-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926463] gpmc,wait-monitoring-ns = <20>; /* 1 ns - 20 ns; 1 ticks */
[    1.926469] gpmc,clk-activation-ns = <10>; /* 1 ns - 10 ns; 1 ticks */
[    1.926475] gpmc,wr-data-mux-bus-ns = <70>; /* 61 ns - 70 ns; 7 ticks */
[    1.926481] gpmc,wr-access-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.926495] GPMC CS0: cs_on            :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.926502] GPMC CS0: cs_rd_off        :   8 ticks,  80 ns (was  16 ticks)  80 ns
[    1.926509] GPMC CS0: cs_wr_off        :   8 ticks,  80 ns (was  10 ticks)  80 ns
[    1.926515] GPMC CS0: adv_on           :   0 ticks,   0 ns (was   4 ticks)   0 ns
[    1.926522] GPMC CS0: adv_rd_off       :   2 ticks,  20 ns (was   6 ticks)  20 ns
[    1.926528] GPMC CS0: adv_wr_off       :   2 ticks,  20 ns (was   6 ticks)  20 ns
[    1.926534] GPMC CS0: adv_aad_mux_on   :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.926540] GPMC CS0: adv_aad_mux_rd_off:   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.926546] GPMC CS0: adv_aad_mux_wr_off:   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.926552] GPMC CS0: oe_on            :   2 ticks,  20 ns (was  14 ticks)  20 ns
[    1.926559] GPMC CS0: oe_off           :   8 ticks,  80 ns (was  16 ticks)  80 ns
[    1.926565] GPMC CS0: oe_aad_mux_on    :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.926571] GPMC CS0: oe_aad_mux_off   :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.926577] GPMC CS0: we_on            :   2 ticks,  20 ns (was   8 ticks)  20 ns
[    1.926584] GPMC CS0: we_off           :   8 ticks,  80 ns (was  10 ticks)  80 ns
[    1.926590] GPMC CS0: rd_cycle         :  16 ticks, 160 ns (was  16 ticks) 160 ns
[    1.926597] GPMC CS0: wr_cycle         :  16 ticks, 160 ns (was  10 ticks) 160 ns
[    1.926603] GPMC CS0: access           :   6 ticks,  60 ns (was  15 ticks)  60 ns
[    1.926610] GPMC CS0: page_burst_access:   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.926617] GPMC CS0: bus_turnaround   :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.926623] GPMC CS0: cycle2cycle_delay:   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.926629] GPMC CS0: wr_data_mux_bus  :   0 ticks,   0 ns (was   7 ticks)   0 ns
[    1.926636] GPMC CS0: wr_access        :   6 ticks,  60 ns (was   8 ticks)  60 ns
[    1.926643] GPMC CS0: wait_monitoring  :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.926648] GPMC CS0: clk_activation   :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.926653] GPMC CS0 CLK period is 20 ns (div 2)
[    1.926659] gpmc cs0 after gpmc_cs_set_timings:
[    1.926663] cs0 GPMC_CS_CONFIG1: 0x28601001
[    1.926667] cs0 GPMC_CS_CONFIG2: 0x00080802
[    1.926671] cs0 GPMC_CS_CONFIG3: 0x00020200
[    1.926674] cs0 GPMC_CS_CONFIG4: 0x08020802
[    1.926678] cs0 GPMC_CS_CONFIG5: 0x02061010
[    1.926682] cs0 GPMC_CS_CONFIG6: 0x86000282
[    1.926684] gpmc cs0 access configuration:
[    1.926688] gpmc,mux-add-data = <0>;
[    1.926691] gpmc,device-width = <2>;
[    1.926694] gpmc,wait-pin = <0>;
[    1.926698] gpmc,wait-on-write = <1>;
[    1.926701] gpmc,wait-on-read = <1>;
[    1.926704] gpmc,burst-length = <4>;
[    1.926708] gpmc,sync-write = <1>;
[    1.926711] gpmc,gpmc,sync-read = <1>;
[    1.926716] gpmc,cycle2cycle-samecsen = <1>;
[    1.926719] gpmc cs0 timings configuration:
[    1.926725] gpmc,cs-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926730] gpmc,cs-rd-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.926736] gpmc,cs-wr-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.926741] gpmc,adv-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926747] gpmc,adv-rd-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926753] gpmc,adv-wr-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926758] gpmc,adv-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926763] gpmc,adv-aad-mux-rd-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926768] gpmc,adv-aad-mux-wr-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926774] gpmc,oe-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926780] gpmc,oe-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.926785] gpmc,oe-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926790] gpmc,oe-aad-mux-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926796] gpmc,we-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926801] gpmc,we-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.926807] gpmc,rd-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.926813] gpmc,wr-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.926818] gpmc,access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.926824] gpmc,page-burst-access-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926830] gpmc,bus-turnaround-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926835] gpmc,cycle2cycle-delay-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.926841] gpmc,wait-monitoring-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926846] gpmc,clk-activation-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926851] gpmc,wr-data-mux-bus-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.926857] gpmc,wr-access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.927489] gpmc_read_settings_dt: page/burst-length set but not used!
[    1.927558] gpmc cs1 before gpmc_cs_program_settings:
[    1.927564] cs1 GPMC_CS_CONFIG1: 0x78601001
[    1.927567] cs1 GPMC_CS_CONFIG2: 0x00080802
[    1.927571] cs1 GPMC_CS_CONFIG3: 0x22060514
[    1.927575] cs1 GPMC_CS_CONFIG4: 0x08020802
[    1.927578] cs1 GPMC_CS_CONFIG5: 0x02061010
[    1.927582] cs1 GPMC_CS_CONFIG6: 0x06000282
[    1.927585] gpmc cs1 access configuration:
[    1.927589] gpmc,mux-add-data = <0>;
[    1.927593] gpmc,device-width = <2>;
[    1.927596] gpmc,wait-pin = <0>;
[    1.927599] gpmc,wait-on-write = <1>;
[    1.927603] gpmc,wait-on-read = <1>;
[    1.927606] gpmc,burst-length = <4>;
[    1.927610] gpmc,sync-write = <1>;
[    1.927613] gpmc,burst-write = <1>;
[    1.927616] gpmc,gpmc,sync-read = <1>;
[    1.927620] gpmc,burst-read = <1>;
[    1.927626] gpmc,cycle2cycle-samecsen = <1>;
[    1.927629] gpmc cs1 timings configuration:
[    1.927636] gpmc,cs-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.927642] gpmc,cs-rd-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.927648] gpmc,cs-wr-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.927654] gpmc,adv-on-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.927659] gpmc,adv-rd-off-ns = <50>; /* 41 ns - 50 ns; 5 ticks */
[    1.927665] gpmc,adv-wr-off-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.927671] gpmc,adv-aad-mux-on-ns = <10>; /* 1 ns - 10 ns; 1 ticks */
[    1.927677] gpmc,adv-aad-mux-rd-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.927683] gpmc,adv-aad-mux-wr-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.927689] gpmc,oe-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.927694] gpmc,oe-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.927700] gpmc,oe-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.927706] gpmc,oe-aad-mux-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.927711] gpmc,we-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.927717] gpmc,we-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.927723] gpmc,rd-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.927729] gpmc,wr-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.927734] gpmc,access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.927740] gpmc,page-burst-access-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.927746] gpmc,bus-turnaround-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.927752] gpmc,cycle2cycle-delay-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.927757] gpmc,wait-monitoring-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.927763] gpmc,clk-activation-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.927768] gpmc,wr-data-mux-bus-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.927773] gpmc,wr-access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.927782] GPMC CS1: cs_on            :   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.927789] GPMC CS1: cs_rd_off        :  10 ticks, 100 ns (was   8 ticks) 100 ns
[    1.927795] GPMC CS1: cs_wr_off        :   4 ticks,  40 ns (was   8 ticks)  40 ns
[    1.927801] GPMC CS1: adv_on           :   0 ticks,   0 ns (was   4 ticks)   0 ns
[    1.927807] GPMC CS1: adv_rd_off       :   2 ticks,  20 ns (was   5 ticks)  20 ns
[    1.927813] GPMC CS1: adv_wr_off       :   2 ticks,  20 ns (was   6 ticks)  20 ns
[    1.927819] GPMC CS1: adv_aad_mux_on   :   0 ticks,   0 ns (was   1 ticks)   0 ns
[    1.927825] GPMC CS1: adv_aad_mux_rd_off:   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.927830] GPMC CS1: adv_aad_mux_wr_off:   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.927837] GPMC CS1: oe_on            :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.927843] GPMC CS1: oe_off           :  10 ticks, 100 ns (was   8 ticks) 100 ns
[    1.927849] GPMC CS1: oe_aad_mux_on    :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.927854] GPMC CS1: oe_aad_mux_off   :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.927860] GPMC CS1: we_on            :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.927866] GPMC CS1: we_off           :   4 ticks,  40 ns (was   8 ticks)  40 ns
[    1.927873] GPMC CS1: rd_cycle         :  12 ticks, 120 ns (was  16 ticks) 120 ns
[    1.927879] GPMC CS1: wr_cycle         :   6 ticks,  60 ns (was  16 ticks)  60 ns
[    1.927885] GPMC CS1: access           :   8 ticks,  80 ns (was   6 ticks)  80 ns
[    1.927891] GPMC CS1: page_burst_access:   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.927897] GPMC CS1: bus_turnaround   :   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.927903] GPMC CS1: cycle2cycle_delay:   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.927909] GPMC CS1: wr_data_mux_bus  :   2 ticks,  20 ns (was   0 ticks)  20 ns
[    1.927915] GPMC CS1: wr_access        :   4 ticks,  40 ns (was   6 ticks)  40 ns
[    1.927921] GPMC CS1: wait_monitoring  :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.927927] GPMC CS1: clk_activation   :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.927931] GPMC CS1 CLK period is 20 ns (div 2)
[    1.927937] gpmc cs1 after gpmc_cs_set_timings:
[    1.927941] cs1 GPMC_CS_CONFIG1: 0x28001201
[    1.927944] cs1 GPMC_CS_CONFIG2: 0x00040a00
[    1.927948] cs1 GPMC_CS_CONFIG3: 0x00020200
[    1.927951] cs1 GPMC_CS_CONFIG4: 0x04020a02
[    1.927955] cs1 GPMC_CS_CONFIG5: 0x0208060c
[    1.927958] cs1 GPMC_CS_CONFIG6: 0x04020280
[    1.927961] gpmc cs1 access configuration:
[    1.927964] gpmc,mux-add-data = <2>;
[    1.927968] gpmc,device-width = <2>;
[    1.927971] gpmc,wait-pin = <0>;
[    1.927975] gpmc,burst-length = <4>;
[    1.927978] gpmc,sync-write = <1>;
[    1.927982] gpmc,gpmc,sync-read = <1>;
[    1.927987] gpmc,cycle2cycle-samecsen = <1>;
[    1.927990] gpmc cs1 timings configuration:
[    1.927995] gpmc,cs-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928001] gpmc,cs-rd-off-ns = <100>; /* 91 ns - 100 ns; 10 ticks */
[    1.928006] gpmc,cs-wr-off-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.928012] gpmc,adv-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928018] gpmc,adv-rd-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928023] gpmc,adv-wr-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928029] gpmc,adv-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928034] gpmc,adv-aad-mux-rd-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928039] gpmc,adv-aad-mux-wr-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928045] gpmc,oe-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928050] gpmc,oe-off-ns = <100>; /* 91 ns - 100 ns; 10 ticks */
[    1.928056] gpmc,oe-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928061] gpmc,oe-aad-mux-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928066] gpmc,we-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928072] gpmc,we-off-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.928078] gpmc,rd-cycle-ns = <120>; /* 111 ns - 120 ns; 12 ticks */
[    1.928084] gpmc,wr-cycle-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.928089] gpmc,access-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.928095] gpmc,page-burst-access-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928100] gpmc,bus-turnaround-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928106] gpmc,cycle2cycle-delay-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928111] gpmc,wait-monitoring-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928116] gpmc,clk-activation-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928122] gpmc,wr-data-mux-bus-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928128] gpmc,wr-access-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.928538] gpmc_read_settings_dt: page/burst-length set but not used!
[    1.928609] gpmc cs2 before gpmc_cs_program_settings:
[    1.928613] cs2 GPMC_CS_CONFIG1: 0x28601001
[    1.928617] cs2 GPMC_CS_CONFIG2: 0x00080802
[    1.928621] cs2 GPMC_CS_CONFIG3: 0x22060514
[    1.928624] cs2 GPMC_CS_CONFIG4: 0x08020802
[    1.928628] cs2 GPMC_CS_CONFIG5: 0x02061010
[    1.928631] cs2 GPMC_CS_CONFIG6: 0x06000282
[    1.928634] gpmc cs2 access configuration:
[    1.928638] gpmc,mux-add-data = <0>;
[    1.928642] gpmc,device-width = <2>;
[    1.928645] gpmc,wait-pin = <0>;
[    1.928649] gpmc,wait-on-write = <1>;
[    1.928652] gpmc,wait-on-read = <1>;
[    1.928655] gpmc,burst-length = <4>;
[    1.928659] gpmc,sync-write = <1>;
[    1.928662] gpmc,gpmc,sync-read = <1>;
[    1.928668] gpmc,cycle2cycle-samecsen = <1>;
[    1.928671] gpmc cs2 timings configuration:
[    1.928678] gpmc,cs-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928684] gpmc,cs-rd-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.928690] gpmc,cs-wr-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.928695] gpmc,adv-on-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.928701] gpmc,adv-rd-off-ns = <50>; /* 41 ns - 50 ns; 5 ticks */
[    1.928707] gpmc,adv-wr-off-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.928712] gpmc,adv-aad-mux-on-ns = <10>; /* 1 ns - 10 ns; 1 ticks */
[    1.928718] gpmc,adv-aad-mux-rd-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928724] gpmc,adv-aad-mux-wr-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928729] gpmc,oe-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928735] gpmc,oe-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.928741] gpmc,oe-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928746] gpmc,oe-aad-mux-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928752] gpmc,we-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928757] gpmc,we-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.928763] gpmc,rd-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.928769] gpmc,wr-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.928775] gpmc,access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.928780] gpmc,page-burst-access-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928786] gpmc,bus-turnaround-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928792] gpmc,cycle2cycle-delay-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.928797] gpmc,wait-monitoring-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928802] gpmc,clk-activation-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928808] gpmc,wr-data-mux-bus-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.928813] gpmc,wr-access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.928822] GPMC CS2: cs_on            :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.928828] GPMC CS2: cs_rd_off        :   8 ticks,  80 ns (was   8 ticks)  80 ns
[    1.928834] GPMC CS2: cs_wr_off        :   8 ticks,  80 ns (was   8 ticks)  80 ns
[    1.928840] GPMC CS2: adv_on           :   0 ticks,   0 ns (was   4 ticks)   0 ns
[    1.928846] GPMC CS2: adv_rd_off       :   2 ticks,  20 ns (was   5 ticks)  20 ns
[    1.928852] GPMC CS2: adv_wr_off       :   2 ticks,  20 ns (was   6 ticks)  20 ns
[    1.928858] GPMC CS2: adv_aad_mux_on   :   0 ticks,   0 ns (was   1 ticks)   0 ns
[    1.928863] GPMC CS2: adv_aad_mux_rd_off:   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.928869] GPMC CS2: adv_aad_mux_wr_off:   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.928875] GPMC CS2: oe_on            :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.928881] GPMC CS2: oe_off           :   8 ticks,  80 ns (was   8 ticks)  80 ns
[    1.928887] GPMC CS2: oe_aad_mux_on    :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.928893] GPMC CS2: oe_aad_mux_off   :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.928899] GPMC CS2: we_on            :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.928905] GPMC CS2: we_off           :   8 ticks,  80 ns (was   8 ticks)  80 ns
[    1.928911] GPMC CS2: rd_cycle         :  16 ticks, 160 ns (was  16 ticks) 160 ns
[    1.928917] GPMC CS2: wr_cycle         :  16 ticks, 160 ns (was  16 ticks) 160 ns
[    1.928924] GPMC CS2: access           :   6 ticks,  60 ns (was   6 ticks)  60 ns
[    1.928930] GPMC CS2: page_burst_access:   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.928936] GPMC CS2: bus_turnaround   :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.928942] GPMC CS2: cycle2cycle_delay:   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.928948] GPMC CS2: wr_data_mux_bus  :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.928954] GPMC CS2: wr_access        :   6 ticks,  60 ns (was   6 ticks)  60 ns
[    1.928961] GPMC CS2: wait_monitoring  :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.928966] GPMC CS2: clk_activation   :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.928970] GPMC CS2 CLK period is 20 ns (div 2)
[    1.928976] gpmc cs2 after gpmc_cs_set_timings:
[    1.928980] cs2 GPMC_CS_CONFIG1: 0x28001001
[    1.928983] cs2 GPMC_CS_CONFIG2: 0x00080802
[    1.928987] cs2 GPMC_CS_CONFIG3: 0x00020200
[    1.928990] cs2 GPMC_CS_CONFIG4: 0x08020802
[    1.928994] cs2 GPMC_CS_CONFIG5: 0x02061010
[    1.928997] cs2 GPMC_CS_CONFIG6: 0x06000282
[    1.929000] gpmc cs2 access configuration:
[    1.929004] gpmc,mux-add-data = <0>;
[    1.929007] gpmc,device-width = <2>;
[    1.929010] gpmc,wait-pin = <0>;
[    1.929014] gpmc,burst-length = <4>;
[    1.929017] gpmc,sync-write = <1>;
[    1.929021] gpmc,gpmc,sync-read = <1>;
[    1.929026] gpmc,cycle2cycle-samecsen = <1>;
[    1.929029] gpmc cs2 timings configuration:
[    1.929034] gpmc,cs-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929040] gpmc,cs-rd-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.929045] gpmc,cs-wr-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.929051] gpmc,adv-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929056] gpmc,adv-rd-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929062] gpmc,adv-wr-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929067] gpmc,adv-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929073] gpmc,adv-aad-mux-rd-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929078] gpmc,adv-aad-mux-wr-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929083] gpmc,oe-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929089] gpmc,oe-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.929095] gpmc,oe-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929100] gpmc,oe-aad-mux-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929105] gpmc,we-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929111] gpmc,we-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.929117] gpmc,rd-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.929122] gpmc,wr-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.929128] gpmc,access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.929134] gpmc,page-burst-access-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929139] gpmc,bus-turnaround-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929145] gpmc,cycle2cycle-delay-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929151] gpmc,wait-monitoring-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929156] gpmc,clk-activation-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929161] gpmc,wr-data-mux-bus-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929167] gpmc,wr-access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.929556] gpmc_read_settings_dt: page/burst-length set but not used!
[    1.929617] gpmc cs3 before gpmc_cs_program_settings:
[    1.929622] cs3 GPMC_CS_CONFIG1: 0x78601001
[    1.929626] cs3 GPMC_CS_CONFIG2: 0x00080802
[    1.929629] cs3 GPMC_CS_CONFIG3: 0x22060514
[    1.929633] cs3 GPMC_CS_CONFIG4: 0x08020802
[    1.929636] cs3 GPMC_CS_CONFIG5: 0x02061010
[    1.929640] cs3 GPMC_CS_CONFIG6: 0x06000282
[    1.929642] gpmc cs3 access configuration:
[    1.929646] gpmc,mux-add-data = <0>;
[    1.929650] gpmc,device-width = <2>;
[    1.929653] gpmc,wait-pin = <0>;
[    1.929657] gpmc,wait-on-write = <1>;
[    1.929660] gpmc,wait-on-read = <1>;
[    1.929663] gpmc,burst-length = <4>;
[    1.929666] gpmc,sync-write = <1>;
[    1.929670] gpmc,burst-write = <1>;
[    1.929673] gpmc,gpmc,sync-read = <1>;
[    1.929676] gpmc,burst-read = <1>;
[    1.929681] gpmc,cycle2cycle-samecsen = <1>;
[    1.929684] gpmc cs3 timings configuration:
[    1.929691] gpmc,cs-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929697] gpmc,cs-rd-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.929702] gpmc,cs-wr-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.929708] gpmc,adv-on-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.929714] gpmc,adv-rd-off-ns = <50>; /* 41 ns - 50 ns; 5 ticks */
[    1.929719] gpmc,adv-wr-off-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.929725] gpmc,adv-aad-mux-on-ns = <10>; /* 1 ns - 10 ns; 1 ticks */
[    1.929731] gpmc,adv-aad-mux-rd-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929736] gpmc,adv-aad-mux-wr-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929742] gpmc,oe-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929747] gpmc,oe-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.929753] gpmc,oe-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929758] gpmc,oe-aad-mux-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929764] gpmc,we-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929769] gpmc,we-off-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.929775] gpmc,rd-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.929781] gpmc,wr-cycle-ns = <160>; /* 151 ns - 160 ns; 16 ticks */
[    1.929786] gpmc,access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.929792] gpmc,page-burst-access-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929798] gpmc,bus-turnaround-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929804] gpmc,cycle2cycle-delay-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.929810] gpmc,wait-monitoring-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929815] gpmc,clk-activation-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929820] gpmc,wr-data-mux-bus-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.929826] gpmc,wr-access-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.929834] GPMC CS3: cs_on            :   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.929840] GPMC CS3: cs_rd_off        :  10 ticks, 100 ns (was   8 ticks) 100 ns
[    1.929847] GPMC CS3: cs_wr_off        :   4 ticks,  40 ns (was   8 ticks)  40 ns
[    1.929852] GPMC CS3: adv_on           :   0 ticks,   0 ns (was   4 ticks)   0 ns
[    1.929858] GPMC CS3: adv_rd_off       :   2 ticks,  20 ns (was   5 ticks)  20 ns
[    1.929864] GPMC CS3: adv_wr_off       :   2 ticks,  20 ns (was   6 ticks)  20 ns
[    1.929870] GPMC CS3: adv_aad_mux_on   :   0 ticks,   0 ns (was   1 ticks)   0 ns
[    1.929876] GPMC CS3: adv_aad_mux_rd_off:   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.929882] GPMC CS3: adv_aad_mux_wr_off:   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.929888] GPMC CS3: oe_on            :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.929894] GPMC CS3: oe_off           :  10 ticks, 100 ns (was   8 ticks) 100 ns
[    1.929900] GPMC CS3: oe_aad_mux_on    :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.929906] GPMC CS3: oe_aad_mux_off   :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.929912] GPMC CS3: we_on            :   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.929918] GPMC CS3: we_off           :   4 ticks,  40 ns (was   8 ticks)  40 ns
[    1.929925] GPMC CS3: rd_cycle         :  12 ticks, 120 ns (was  16 ticks) 120 ns
[    1.929931] GPMC CS3: wr_cycle         :   6 ticks,  60 ns (was  16 ticks)  60 ns
[    1.929937] GPMC CS3: access           :   8 ticks,  80 ns (was   6 ticks)  80 ns
[    1.929943] GPMC CS3: page_burst_access:   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.929949] GPMC CS3: bus_turnaround   :   0 ticks,   0 ns (was   2 ticks)   0 ns
[    1.929955] GPMC CS3: cycle2cycle_delay:   2 ticks,  20 ns (was   2 ticks)  20 ns
[    1.929961] GPMC CS3: wr_data_mux_bus  :   2 ticks,  20 ns (was   0 ticks)  20 ns
[    1.929967] GPMC CS3: wr_access        :   4 ticks,  40 ns (was   6 ticks)  40 ns
[    1.929973] GPMC CS3: wait_monitoring  :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.929979] GPMC CS3: clk_activation   :   0 ticks,   0 ns (was   0 ticks)   0 ns
[    1.929983] GPMC CS3 CLK period is 20 ns (div 2)
[    1.929988] gpmc cs3 after gpmc_cs_set_timings:
[    1.929992] cs3 GPMC_CS_CONFIG1: 0x28001201
[    1.929995] cs3 GPMC_CS_CONFIG2: 0x00040a00
[    1.929999] cs3 GPMC_CS_CONFIG3: 0x00020200
[    1.930003] cs3 GPMC_CS_CONFIG4: 0x04020a02
[    1.930006] cs3 GPMC_CS_CONFIG5: 0x0208060c
[    1.930010] cs3 GPMC_CS_CONFIG6: 0x04020280
[    1.930012] gpmc cs3 access configuration:
[    1.930016] gpmc,mux-add-data = <2>;
[    1.930019] gpmc,device-width = <2>;
[    1.930023] gpmc,wait-pin = <0>;
[    1.930026] gpmc,burst-length = <4>;
[    1.930029] gpmc,sync-write = <1>;
[    1.930033] gpmc,gpmc,sync-read = <1>;
[    1.930038] gpmc,cycle2cycle-samecsen = <1>;
[    1.930041] gpmc cs3 timings configuration:
[    1.930046] gpmc,cs-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930052] gpmc,cs-rd-off-ns = <100>; /* 91 ns - 100 ns; 10 ticks */
[    1.930058] gpmc,cs-wr-off-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.930063] gpmc,adv-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930069] gpmc,adv-rd-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.930074] gpmc,adv-wr-off-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.930080] gpmc,adv-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930085] gpmc,adv-aad-mux-rd-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930090] gpmc,adv-aad-mux-wr-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930095] gpmc,oe-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.930101] gpmc,oe-off-ns = <100>; /* 91 ns - 100 ns; 10 ticks */
[    1.930107] gpmc,oe-aad-mux-on-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930112] gpmc,oe-aad-mux-off-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930117] gpmc,we-on-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.930123] gpmc,we-off-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.930129] gpmc,rd-cycle-ns = <120>; /* 111 ns - 120 ns; 12 ticks */
[    1.930135] gpmc,wr-cycle-ns = <60>; /* 51 ns - 60 ns; 6 ticks */
[    1.930141] gpmc,access-ns = <80>; /* 71 ns - 80 ns; 8 ticks */
[    1.930146] gpmc,page-burst-access-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.930152] gpmc,bus-turnaround-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930157] gpmc,cycle2cycle-delay-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.930163] gpmc,wait-monitoring-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930168] gpmc,clk-activation-ns = <0>; /* 0 ns - 0 ns; 0 ticks */
[    1.930174] gpmc,wr-data-mux-bus-ns = <20>; /* 11 ns - 20 ns; 2 ticks */
[    1.930179] gpmc,wr-access-ns = <40>; /* 31 ns - 40 ns; 4 ticks */
[    1.936014] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 100 kHz
[    1.944787] omap_i2c 4802a000.i2c: bus 1 rev0.11 at 100 kHz
[    1.945435] omap_rtc 44e3e000.rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
[    1.945917] vdd5_reg: disabling
[    1.946001] Warning: unable to open an initial console.
[    1.957379] Freeing unused kernel memory: 7168K
[    2.303457] random: fast init done
[    4.248590] SB_TYPE=hdsb_serial
[    4.248791] SB_TYPE=hdsb_serial
[    5.739459] mmcblk0: mmc0:0001 MMC02G 1.79 GiB 
[    5.747731] mmcblk0boot0: mmc0:0001 MMC02G partition 1 1.00 MiB
[    5.754032] mmcblk0boot1: mmc0:0001 MMC02G partition 2 1.00 MiB
[    5.760140] mmcblk0rpmb: mmc0:0001 MMC02G partition 3 128 KiB
[    5.792904] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    5.926396] mmc0: switch to bus width 4 failed
[    5.932387] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    5.942084] mmcblk0: retrying using single block read
[    5.947503] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[    5.956867] print_req_error: I/O error, dev mmcblk0, sector 0
[    5.987369] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[    5.996671] print_req_error: I/O error, dev mmcblk0, sector 1
[    6.027165] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[    6.036463] print_req_error: I/O error, dev mmcblk0, sector 2
[    6.042556] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[    6.051835] print_req_error: I/O error, dev mmcblk0, sector 3
[    6.082353] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[    6.091648] print_req_error: I/O error, dev mmcblk0, sector 4
[    6.122153] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[    6.131448] print_req_error: I/O error, dev mmcblk0, sector 5
[    6.161949] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[    6.171249] print_req_error: I/O error, dev mmcblk0, sector 6
[    6.201754] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[    6.211049] print_req_error: I/O error, dev mmcblk0, sector 7
[    6.216844] Buffer I/O error on dev mmcblk0, logical block 0, async page read
[    6.249012] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    6.258490] mmcblk0: retrying using single block read
[    6.263907] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[    6.273170] print_req_error: I/O error, dev mmcblk0, sector 0
[    6.280592] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[    6.295122] print_req_error: I/O error, dev mmcblk0, sector 1
[    6.306653] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[    6.348173] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[    6.388738] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[    6.427246] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[    6.466641] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[    6.476377] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[    6.485702] Buffer I/O error on dev mmcblk0, logical block 0, async page read
[    6.492896]  mmcblk0: unable to read partition table
[    7.485079]  /mnt/data/speedbridge.cfg  file not found!
[    7.493701] preparing emmc
[    7.502757] Creating partition on eMMC - please wait...
[    7.536918] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    7.546456] mmcblk0: retrying using single block read
[    7.576342] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[    7.585961] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[    7.619957] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[    7.653978] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[    7.687959] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[    7.721972] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[    7.755984] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[    7.789996] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[    7.834335] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    7.844048] mmcblk0: retrying using single block read
[    7.873940] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[    7.907994] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[    7.942002] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[    7.951624] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[    7.961224] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[    7.995244] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[    8.029255] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[    8.063266] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[    8.097514] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    8.107000] mmcblk0: retrying using single block read
[    8.112401] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[    8.146425] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[    8.180474] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[    8.214472] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[    8.224092] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[    8.258086] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[    8.292097] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[    8.326110] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[    8.335413] Buffer I/O error on dev mmcblk0, logical block 0, async page read
[    8.367511] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    8.376992] mmcblk0: retrying using single block read
[    8.382392] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[    8.416424] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[    8.450470] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[    8.484465] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[    8.518480] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[    8.552489] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[    8.586504] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[    8.620518] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[    8.629816] Buffer I/O error on dev mmcblk0, logical block 0, async page read
[    8.668474] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    8.678124] mmcblk0: retrying using single block read
[    8.707960] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[    8.742045] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[    8.776051] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[    8.810069] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[    8.844085] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[    8.878063] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[    8.912075] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[    8.946086] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[    8.980332] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    8.989814] mmcblk0: retrying using single block read
[    9.019627] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[    9.053649] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[    9.087654] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[    9.121667] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[    9.155677] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[    9.189689] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[    9.223699] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[    9.257703] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[    9.267004] Buffer I/O error on dev mmcblk0, logical block 0, async page read
[    9.274697] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[    9.284155] mmcblk0: retrying using single block read
[    9.289542] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[    9.323562] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[    9.357565] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[    9.391610] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[    9.425603] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[    9.459618] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[    9.493628] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[    9.527626] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[    9.536923] Buffer I/O error on dev mmcblk0, logical block 0, async page read
[    9.602450] Executing HDESB_SERIAL nework setup script, eth0 dynamic
[    9.629367] net eth0: initializing cpsw version 1.12 (0)
[    9.656992] Generic PHY 4a101000.mdio:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
[    9.677742] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[    9.721220] Setting IP address 0.0.0.0 on eth0
[   18.955724] Reconfiguring network interfaces... 
[   19.274992] net eth0: initializing cpsw version 1.12 (0)
[   19.288284] Generic PHY 4a101000.mdio:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
[   19.306954] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[   19.324207] Setting IP address 0.0.0.0 on eth0
[   28.631535] done.
[   28.682000] GATEWAY_IP=
[   28.704038] random: dropbear: uninitialized urandom read (32 bytes read)

*** Welcome to Cadence SpeedBridges **** 

Welcome to Cadence hdsb_serial /dev/ttyS0

Welcome to Cadence hdsb_serial /dev/ttyS0

hdsb_serial login:

for dts file

Thanks

Chris

0 Chris Zhao1 over 4 years ago in reply to peaves

Expert 1240 points

Hi Paul,

Thanks for your valuable input.

For this board, I copied the trace length below, the clock trace is about 0.1" less than CMD and data bus, based on your point, the clock trace should be longer than CMD and data bus, is that right? while the delay for 1" FR4 is about 160-180ps, I mean it's not that easy to compensate by PCB trace, 5" trace can give us 1ns.

Back to my board, so I can modify the mmc.c file to set timing to MMC_TIMING_LEGACY (which is zero), so I could get the same timing as low speed, is that right? By the way, I found the clock of my board is like 24MHz, so I'm running at standard mode, not high speed mode.

Regards
Chris

0 peaves over 4 years ago in reply to Chris Zhao1

TI__Guru 58165 points

I’m not sure which trace lengths need to be shorter/longer without taking everything into consideration.

For example, let us assume all trace delays are the same (5ns) and you are operating at 24MHz with the following timing parameters values.

CLK period is 41.67ns
PCB trace delay is 5ns
eMMC minimum setup requirement of 3ns
eMMC minimum hold requirement of 3ns
eMMC minimum output delay of 2.5ns
eMMC maximum output delay of 13.7ns
AM3352 minimum setup requirement of 4.1ns
AM3352 minimum hold requirement of 3.76ns
AM3352 (standard mode) minimum output delay of -4ns
AM3352 (standard mode) maximum output delay of 14ns
AM3352 (high-speed mode) minimum output delay of 3ns
AM3352 (high-speed mode) maximum output delay of 14ns

The eMMC device always changes data on the rising edge of clock and latches data on the rising edge of clock. This provides the following margin for the AM3352 devices.

Setup margin for the AM3352 would be the clock period minus AM3352 min setup requirement minus max output delay from eMMC minus PCB trace delay times 2, which is [41.67 – 4.1 – 13.7 – (2*5)], or 13.87ns.
Hold margin for the AM3352 would be min output delay of eMMC plus PCB trace delay times 2, which is [2.5 + (2*5)], or 12.5ns.

When operating in standard mode, AM3352 changes data on the falling edge of clock and latches data on the rising edge of clock. In this case you would have the following eMMC margins.

Setup margin for the eMMC would be half of clock period minus max output delay from AM3352 minus eMMC min setup requirement, which is [(41.67/2) – 14 – 3], or 3.83ns.
Hold margin for the eMMC would be half of clock period plus min output delay from AM3352 minus eMMC min hold requirement, which is [(41.67/2) + (-4) – 3], or 13.83ns.

When operating in high-speed mode, AM3352 changes data on the rising edge of clock and latches data on the rising edge of clock. In this case you would have the following eMMC margins.

Setup margin for the eMMC would be the clock period minus max output delay from AM3352 minus eMMC min setup requirement, which is [41.67 – 14 – 3], or 24.67ns.
Hold margin for the eMMC would be min output delay from AM3352 minus eMMC min hold requirement, which is [3 – 3], or 0ns.

In this example, high-speed mode would provide marginal hold time for eMMC. However, standard mode provides lots of margin. While designing your PCB you could have made the CMD/DAT traces longer than CLK traces to provide more hold margin to the eMMC device when operating in high-speed mode.

I hope this helps you understand.

Regards,
Paul

0 Chris Zhao1 over 4 years ago in reply to peaves

Expert 1240 points

Hi Paul

The PCB trace length for CLK, CMD and DATA is 1.6" +- 0.1", so they are kind of the same length, sharing a trace delay about 0.3ns. This is the 3rd kind of board, the trace length in other two boards is also kind of the same.

The setup and hold time be considered is for AM3352, is that right?
For emmc, with same trace length, as there is output delay of AM3352, so emmc should be able to sample the data in high speed mode, as the minimum output delay of AM3352 is the same as emmc minimum setup time, both are 3ns. while as for the standard mode you mentioned, the minimum output delay is -4ns, I don't know how to calculate for emmc, do we need a compensation of 3-(-4) = 7ns in PCB, sorry I'm not sure of that.

if the setup and hold time to be calculated is for AM3352, then it's the output of emmc, which is the reponse in CMD line, then the basic timing will be AM3352 drives CMD on 1st rising edge, emmc recieves the CMD and send response on the 2nd rising edge, finally AM3352 receives the response at the 3rd rising edge, if so:

For setup margin,
- In high speed mode, I think we should use T - 2 * (Trace delay) - Ouptput_delay(AM3352) - Output_delay(emmc) - setup time, which is 41.67 - 2*0.3 - 13.7ns - 14 - 4.1 = 9.27ns.
- In low speed mode, the T should be replaced with T/2, as T is about 2.5us, so no need to calculate it.

For hold margin,
- In high speed mode, I think we should use Ouptput_delay(AM3352) + 2 * (Trace delay) + Output_delay(emmc) - hold time, which is 3 + 2 * 0.3 + 2.5 - 3.76 = 2.34ns
- In low speed mode, didn't figure out.

One more finding with the response waveform in high speed, the time interval is 50ns, so maybe there is no setup violation for AM3352 to receive the response from emmc, I'll make the measurement one more time next Monday.

Back to my question, why will I get an error as shown below:

////////////////////////////////////////////
[ 7.493701] preparing emmc
[ 7.502757] Creating partition on eMMC - please wait...
[ 7.536918] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
[ 7.546456] mmcblk0: retrying using single block read
[ 7.576342] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
[ 7.585961] mmcblk0: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0
[ 7.619957] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0
[ 7.653978] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0
[ 7.687959] mmcblk0: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0
[ 7.721972] mmcblk0: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0
[ 7.755984] mmcblk0: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0
[ 7.789996] mmcblk0: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0
[ 7.834335] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
////////////////////////////////////////////

Thanks
Chris

0 Andreas Dannenberg over 4 years ago in reply to Chris Zhao1

TI__Guru 57986 points

Chris,

Chris Zhao1 said:
MPN for emmc is MTFC2GMDEA-0M WT, and this is the 3rd kind of board using this part, previous two kinds should be working fine.

Ok, thanks for confirming. The new board you are now debugging, do you see this issue on just one board, or all of your new boards? You are getting data checksum or corruption errors, maybe there is some short or something else affecting the SD interface. If you see the same issue on multiple boards, that would be less likely a cause. I would double-check that none of the CMD, CLK, and DATx lines is shorted with each other or against GND or a power rail.

Chris Zhao1 said:
I attached my schematic and log below, "mmc info" will give me nothing. By the way, dts file will be used by linux only, is that right?

Thanks, schematic and DTS look fine. Also the reason "mmc info" doesn't give you anything is I see you boot from SPI Flash, and U-Boot gives some MMC-related errors too during probe, which may or may not be related to the issue under discussion, but let's put this aside for now since we focus on the Kernel. Also DTS files are typically used in U-Boot and Kernel (two distinct sources), and should largely match when it comes to peripheral configuration.

Chris Zhao1 said:
For boot log:

The errr -84 (-EILSEQ) points to some bad data corruption being detected by the driver, either a data or command CRC or "end bit error", which I suppose could be triggered by shorts or other catastrophic issues, hence the suggestion earlier to double-check continuity of the signals and make sure there are no shorts, etc. From my past experience often errors caused by wrong signal length, routing, etc. manifest themselves in sporadic errors but not errors happening so early and at the same place like you are seeing, especially not at rather low frequencies like in the 25MHz range you see.

As a next step I would probably experiment with the interface setup in DTS some to see if this has impact. Specifically, I would try all of the following (and combinations thereof, potentially), and see what impact it has. This will involve re-building the DTS file.

Add sdhci-caps-mask = <0x6 0x0>; to the &mmc1 DTS node to disable SDR104+DDR50 modes,
Add bus-width = <1>; to restrict data exchange to a single line
Add max-frequency = <10000000>; or other values (the driver might not take just any value, so be cautious) to restrict the maximum bus frequency

Regards, Andreas

0 peaves over 4 years ago in reply to Chris Zhao1

TI__Guru 58165 points

No, you need to evaluate timing to both devices.

Minimum output delay of one devices is not used to evaluate setup time on the other device. Minimum output delay of one device is used to validate hold time margin of the other device, and maximum output delay of one device is used to evaluate setup times of the other device. I provided an explanation how you should calculate timing margin for each device in my example. You need to read them carefully.

The AM3352 minimum output delay of -4ns is for operating in standard mode where AM3352 changes data on the falling edge of CLK. So there is a half cycle of offset relative to when data is latched by the eMMC device.

As I pointed out in my example, you could have a hold time violation for the eMMC device when operating in high-speed mode if your trace delays are approximately equal. The eMMC devices has a hold time requirement of 3ns that is relative to the rising edge of CLK. The AM3352 also changes data on the rising edge of clock when operating in high-speed mode and the minimum output delay is 3ns. So your DAT/CMD signal traces must have longer delays than CLK to avoid a hold time violation on the eMMC device.

You should not include AM3352 output delay in your AM3352 setup calculation. The AM3352 setup margin would be 41.67 – 2*0.3 – 13.7 – 4.1 = 23.27ns.

You do not use AM3352 output delay in your AM3352 hold calculation. The hold margin calculation is eMMC minimum output delay plus the delay of the CLK signal plus the delay of the respective CMD/DAT signal minus the AM3352 hold requirement. Since both of your signal delays are 0.3ns the AM3352 hold margin would be 2.5 + 2*0.3 – 3.76 = -0.66ns. This negative margin indicates there is a good chance you are violating AM3352 hold margin. This could be your problem.

Regards,

Paul

0 Chris Zhao1 over 4 years ago in reply to Andreas Dannenberg

Expert 1240 points

Hi Andreas,

This is the 3rd kind of board I have designed using this part, previous two kinds work well, while I don't think we have produced large quantity, at least should be more than 40 I think. As for this 3rd kind of board, we produced 10 for the initial bring-up, three have problem.

- One board, I couldn't measure any CLK and CMD waveform, so I think that part is broken;

- For the 2nd board, I could always measure waveform sent by AM3352, there is no response waveform, which I believe should be another broken part.

- For the 3rd board, it's the very board I have been debugging with.

I made a modification mmc.c under u-boot/drivers/mmc/mmc.c, in which I changed the 2nd paramter of mmc_set_timing function to MMC_TIMING_LEGACY, then mmc can work under uboot.

I also tried to modify mmc.c under linux/drivers/mmc/core/mmc.c, while it didn't work for linux.

I tried to set max-frequency to 10MHz, while it doesn't work. The three lines you suggested to add in dts, no improvement.

I have bought several new parts to replace the 1st and 2nd broken boards firstly, based my experience, there might be one broken part in ten, I can't believe there will be 3 in 10, I'll update later.

Regards

Chris

0 Andreas Dannenberg over 4 years ago in reply to Chris Zhao1

TI__Guru 57986 points

Hi Chris,

Chris Zhao1 said:
I have bought several new parts to replace the 1st and 2nd broken boards firstly, based my experience, there might be one broken part in ten, I can't believe there will be 3 in 10, I'll update later.

There are vendors that sell adapters containing an eMMC device socket on a small PCB that can be plugged into an SD card interface, such as this here:

https://www.amazon.com/eMCP-SD-Programming-Chip-off-Extractor-Black-SD/dp/B076JCL63S

I've used such an adapter in the past to test and pre-program eMMC devices (using a Linux PC) with good success. It might be a good way for you to double-check that the eMMC devices fundamentally work.

Either that, or there could be some concern with your PCB manufacturing process potentially resulting in shorts or unconnected pins. For example that you don't see any CLK/CMD activity at all is very unusual.

Regards, Andreas

0 Chris Zhao1 over 4 years ago in reply to Andreas Dannenberg

Expert 1240 points

Hi Andreas,

You are right, the problem is with the connectivity of signals, during rework, I found a mistake with PCB fab in via-in-pad process, a technician guy helped me several times to get the three boards fixed, now all boards are working.

Thank you

Chris

0 Andreas Dannenberg over 4 years ago in reply to Chris Zhao1

TI__Guru 57986 points

Chris,

Chris Zhao1 said:
You are right, the problem is with the connectivity of signals, during rework

awesome, thanks for closing the loop here and reporting back your findings.

Regards, Andreas

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