TDA4VM：TDA4 - Enable MCU R5F lock step mode

Hi Piyali,

Thanks for your reply.

I checked SBL_ConfigMcuLockStep (). Do we have to set core_id to MCU1_SMP_ID to enable lock step mode of MCU1_CPU0_ID?

How to confirm that MCU1_CPU0 has successfully turned on the lock step mode?

Regards,

ChunChu

Hi ChunChu

If you are using /pdk/packages/ti/boot/sbl/tools/scripts/K3ImageGen.sh, yes you would need to set MCU1_SMP_ID for the application image.

You should be able to see the CTRLMMR_MCUSEC_CLSTR0_CFG bit 0 set to 1 when the R5Fs are in lock step.

Thanks and Regards

Piyali

Hi Piyali,

1. I have turned on MCU1_CPU0 lockstep mode and read the CTRLMMR_MCUSEC_CLSTR0_CFG->LOCKSTEP to 1 in the adc_app example of MCU1_CPU0. But CCMSR1->CMPE1 is always 0x1: CPU signal compare mismatch, why is it? (Lockstep operation mode is 0x0: active compare lockstep mode)

2. Can I only check CCMSR1 status by polling? Is there a way to trigger the compare error in CCMSR1 via an interrupt?

Regards,

ChunChu

Hi ChunChu

Are you rebooting the R5F subsystem after writing to the lockstep bit? If not, you would need to do that to enter into lockstep mode. Please have a look at the sequence in pdk/packages/ti/boot/sbl/soc/k3/sbl_slave_core_boot.c

Function: SBL_ConfigMcuLockStep

Thanks and Regards

Piyali

Hi Piyali,

SDK:6.1.0
I boot the adc_app example of MCU1_CPU0 with SD card in pdk / packages / ti / boot / sbl / board / k3 / sbl_main.c.
Function: SBL_ImageCopy

As you said, before calling SBL_ConfigMcuLockStep (), need to call SBL_SetupCoreMem (), and enable MCU1_CPU0_ID lockstep mode by entering core_id = MCU1_SMP_ID, but I do n’t know how to make the input parameter of SBL_SetupCoreMem () to MCU1_SMP_ID

At present, my method is to set the runLockStep function in SBL_SetupCoreMem () to 1 to start the MCU1_CPU0_ID lockstep mode. If the above method is wrong, how can I correctly start the MCU1_CPU0_ID lockstep mode?

Regards,

ChunChu

Hi Piyali,

I have made new progress,
As mentioned above, in the adc_app example, CCMSR1-> CMPE1 is always 0x1.
-->The issue is that I did not clear the comparison error signal (CCMSR1-> CMPE1) in the adc_app example. After starting the APP, clear CCMSR1-> CMPE1 once, I will no longer see CCMSR1-> CMPE1 as 0x1.

But I have another question, I hope you can answer it:
Is there a way to trigger the compare error(CMPE1) in CCMSR1 via an interrupt? (I am polling in the adc_app example to check the status of CCMSR1, but this is too slow, which will prevent me from getting the status of the "Error Forcing Mode" and "Self Test Error Forcing Mode".)

Regards,

ChunChu