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Compiler/TDA2SX: How to use ccs8 to debug a task

Part Number: TDA2SX

Tool/software: TI C/C++ Compiler

Hi all,

       I use early boot on the tds2x, the early boot is tds2x's case "early_capture_late_weston", I want to use ccs8 to debug what happen when the early boot mode is running.whent the uboot loaded the ipu2xx.xem4 file, it's running early boot usecase.Then I use seed-xds560v2 to debug the board.But when I run the main function of IPU2, It can't run to the "System_main" task which is created by "System_start" function.Some debug tools can debug the task indepently.But I don't know how to use ccs8 to debug the task.The code is below, could anybody help me?

Regards

Jason

Int32 main(void)
{
    Uint32 status;

    status = main_common();

    return (status);
}

Int32 main_common(void)
{
    /* This is for debug purpose- see the description of function header */
    StartupEmulatorWaitFxn();

#ifdef A15_TARGET_OS_LINUX
    Registry_Result result;

    /* register with xdc.runtime to get a diags mask */
    result = Registry_addModule(&Registry_CURDESC, MODULE_NAME);
    Assert_isTrue(result == Registry_SUCCESS, (Assert_Id)NULL);

    /* enable some log events */
    Diags_setMask(MODULE_NAME"+EXF");
#endif

    /* This should the first call for initializing the remote debug server
     */
    RemoteLog_init();

#ifdef IPU_PRIMARY_CORE_IPU2
       IPU_primary_core_init();
#endif
    printf("main_common test\r\n");
    Vps_printf(" ***** IPU2 Firmware build time %s %s\n",
               __TIME__,__DATE__);

    {
        UInt32 clkHz;

        clkHz = Utils_getClkHz(UTILS_CLK_ID_IPU);

        if(clkHz==0U)
        {
            clkHz = SYSTEM_IPU_FREQ;
        }

        Utils_setCpuFrequency(clkHz);
    }

    Utils_idlePrepare();

    /* The load module does not update the total elapsed time for the idle
     * function on Core1 if no task switches happen. So, If Core1 is lightly loaded
     * and there are no task switches during the sampling window, the idle task
     * load on Core 1 will get artificially inflated. This is a Bug in Bios, will
     * get fixed in 6.42.01.
     * In the mean time, use the below workaround,
     * Every clock tick send an SEV to wakeup IPU C1 and set the SEVONPEND to
     * allow waking up.
     */
    Utils_idleSetupSEVONPEND(0x1);

#ifdef IPU_PRIMARY_CORE_IPU2
    System_start(Chains_main);
#else
    System_start(IPU2_main);
#endif
    BIOS_start();

    return SYSTEM_LINK_STATUS_SOK;
}

Int32 System_start(Task_FuncPtr chainsMainFunc)
{

    if(!System_isFastBootEnabled())
    {
        System_ipcStart();
    }
    else
    {
        /* When fast boot is enabled System_ipcStart() is called
         * by Utils_syncSlaves() to sync up with other slaves.
         * IPU1_0 call this after image is loaded on slave cores
         * and they are out of reset
         * This is valid only for tda3x.
         */

        if (System_getSelfProcId()!=SYSTEM_IPU_PROC_PRIMARY)
        {
            System_ipcStart();
        }
    }

    memset(&gSystem_objCommon, 0, sizeof(gSystem_objCommon));

    gSystem_objCommon.chainsMainFunc = chainsMainFunc;

    gSystem_objCommon.tsk = BspOsal_taskCreate(
                                (BspOsal_TaskFuncPtr)System_main,
                                "System main",
                                (Int32)SYSTEM_TSK_PRI,
                                gSystem_tskStack,
                                sizeof(gSystem_tskStack),
                                NULL,
                                UTILS_TSK_AFFINITY_CORE0);
    /* MISRA.CAST.FUNC_PTR
     * MISRAC_2004 Rule_11.1
     * MISRAC_WAIVER:
     * Valid type-casting from function pointer to function pointer.
     */

    UTILS_assert(gSystem_objCommon.tsk != NULL);

    return SYSTEM_LINK_STATUS_SOK;
}

Void System_main(UArg arg0, UArg arg1)
{
    UInt32 selfProcId = System_getSelfProcId();
    UInt32 i = 0;
    System_enumAssertCheck();
    while(i == 0);
#if defined(BUILD_ARP32) && defined(TDA3XX_BUILD)
    /* Doing a Timer Xbar configuration update as BIOS is hardcoding this
     * value this has to be reverted after fix in bios
     * 6th Irq Cross bar instance is tied to 32th instance for Timer 1.
     * 7th Irq Cross bar instance is tied to 33th instance for Timer 2.
     */
    IntXbar_connectIRQ(5U, 32U);
    IntXbar_connectIRQ(6U, 33U);
#endif

    System_initCommon();
    System_init();

    if(!System_isFastBootEnabled())
    {
        System_initDone();
        System_testInitDone();
    }
    else
    {
        if(selfProcId!= SYSTEM_IPU_PROC_PRIMARY)
        {
            System_coreInitDone(SYSTEM_IPU_PROC_PRIMARY);
            System_coreTestInitDone(SYSTEM_IPU_PROC_PRIMARY);

        }
        else
        {
            if(System_isProcEnabled(SYSTEM_PROC_IPU1_1))
            {
                System_coreInitDone(SYSTEM_PROC_IPU1_1);
                System_coreTestInitDone(SYSTEM_PROC_IPU1_1);
            }
        }
    }

    System_confirmInitDone();

#ifdef OPENCL_SUPPORT
#ifdef BUILD_DSP_1
/* Adding the support of OpenCL DSP accelaration */
    Vps_printf(" SYSTEM: Initializing DSP OpenCL ... !!! \r\n");
    {
      rtos_init_ocl_dsp_monitor(arg0, arg1);
    }
    Vps_printf(" SYSTEM: Initializing DSP OpenCL ... DONE !!! \r\n");
#endif
#endif

#ifdef RTI_INCLUDE
    System_rtiInit();
#endif


#ifdef BUILD_A15
    File_init();
#endif
#ifdef BUILD_DSP
#ifdef ECC_FFI_INCLUDE
   Utils_xmcMpuInit();
#endif
#endif

#if defined(BUILD_DSP) || defined(BUILD_ARP32)
#ifdef ECC_FFI_INCLUDE
    /* Firewall updates if any on DSP/ARP32 should happen only after
     * M4 has done the basic initialization in System_init()
     */
    Utils_l3FwSetup();
#endif
#endif

    UTILS_assert(gSystem_objCommon.chainsMainFunc != NULL);

    gSystem_objCommon.chainsMainFunc((xdc_UArg)NULL, (xdc_UArg)NULL);
                /* MISRA.CAST.PTR_TO_INT
                * MISRAC_2004_Rule_11.3: Cast between a pointer and an
                * integral type
                * KW State: Defer -> Waiver -> Case by case
                *
                */

#if defined(BUILD_DSP) || defined(BUILD_ARP32)
#ifdef ECC_FFI_INCLUDE
    Utils_l3FwReset();
#endif
#endif

#ifdef BUILD_DSP
#ifdef ECC_FFI_INCLUDE
    Utils_xmcMpuDeInit();
#endif
#endif

#ifdef BUILD_A15
    File_deInit();
#endif


#ifdef RTI_INCLUDE
    System_rtiDeinit();
#endif

    System_deInit(FALSE);
    System_deInitCommon();

    System_triggerAppExit();

    /* Only SYSTEM_IPU_PROC_PRIMARY waits here */
    System_waitAppExitDone();

#ifndef BUILD_A15
    /* There is a known issue in Ipc_detach when the A15 tries to
     * perform an Ipc_detach the code on A15 crashed with an abort
     * hence this is not run on A15. The effect if all other cores
     * detach from A15 but A15 does not detach itself from other cores
     */
    /* Make sure the IPC is detached */
    System_ipcDetach();

    System_ipcStop();
#endif

    System_ipcDeInitConfig();

    System_triggerAppExitDone();

    /*
     * Jenkins script executes a DSS script. This DSS script is for nightly
     * automation. It runs the testsuite for a particular number of times and
     * then exits. The DSS script keeps checking the UART log to find a string
     * "DEMO END". Once this string is found on the console, DSS will exit.
    */
    if(System_getSelfProcId()==SYSTEM_IPU_PROC_PRIMARY)
    {
        Vps_printf("###############APPLICATION END########################\n");
        System_printf("############APPLICATION END########################\n");
    }

    BspOsal_sleep(50U);
}