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Original question:

AM3352: LCDC DMA not working

AM3358: LCD LIDD mode issue

Anand Kumar6
Prodigy 150 points
Part Number: AM3358
Other Parts Discussed in Thread: SYSCONFIG


Dear All,

I came across a post in TI forum where the LCD DMA interrupt was not getting triggererd. I am having a similar issue with interrrupts.

Could someone please advice on what needs to be done.


I am having problem writing to a character 16 x 2  LCD with DMA enabled. Please note that, the same character LCD works fine when DMA is not enabled.

I followed the sequence of:-

1. Enabling clocks in for LCD_CLKC_ENABLE for the clocks of DMA, LIDD & Core clock. I write and read back the value of 0x07.

2. I initialize the LCD using the LIDD_CS0_DATA & LIDD_CS0_ADDR. I see the cursor blinking and I also see a number "4" bein displayed when I write 0x34 to LIDD_CS0_DATA.
    So this proves the LCD module is working and the LCD is initialized perfectly and character is also displayed on the LCD. So the LCD is also working.

3. Next  data is written into the virtual memory location allocated by a kernel module from the user space program. The physical memory address of the virtual memory allocated in the kernel module,
is read by into the user space process and the same physical memory base address is used in step 6. The ceiling address of the physical memory is calculated from the base based on number of words written.

4. In the LIDD_CTRL, the DMA enable bit, "lidd_dma_en" was always set to 0, right from start of the program. This is to disable the DMA right from start.
    As for the "dma_cs0_cs1" bit is set to 0, so that the DMA uses LIDD CS0 (Frame Buffer0).

5. The LCDDMA_CTRL is set to 0x00.

6. The LCDDMA_FB0_BASE is written with the Physical memory address.

7. The LCDDMA_FB0_CEILING is written with the Physical memory address.

8. Next the Interrupt is enabled by setting the bit, "done_en_set" of the IRQENABLE_SET.

9. Next In the LIDD_CTRL, the DMA enable bit, "lidd_dma_en" is set to 1 to enable the DMA.

10. There is continuous while loop polling of the IRQSTATUS register for the done bit to become set.

But in the program the "done_en_set" of the IRQENABLE_SET never gets set. I don't know why?.

To verify, if data is getting written in the memory allocated by the kernel module, I read back the data from the memory location and it reads correctly.

So I am not sure if this is problem with DMA of the LIDD LCD module or is there some sequence missing.

So can someone help me is getting the LIDD DMA to work?.

Please help me to resolve this issue.

Thanks & Regards
Anu

  • 0
    TI__Mastermind 44575 points

    Hello Anu,

    Unfortunately, we do not support LIDD mode in the PSDK Linux. With regards to the DMA, please refer to the "Advisory 1.0.27" in the silicon errata.

    Regards,
    Krunal

  • 0 in reply to Krunal Bhargav34
    Prodigy 150 points

    Hi Krunal,

    Thank you for your response. I tried to do what was mentioned in "Advisory 1.0.27", even though it isn't directly related to the problem I have.

    But it didn’t help.

    My problem is that whatever I do, the DONE bit in the IRQSTATUS/ IRQSTATUS_RAW never gets set while I poll.

    I had enabled the DONE bit interrupt using IRQENABLE_SET. I then copy the physical memory address for FB0 Base and FB0 Ceiling, for DMA access.

    Then I write to these addresses.

    What is expected is that after one frame of data( or a min of 8 words) is transferred from FB to the FIFO, the done bit in the IRQSTATUS register should change from 0 to 1. This never happens.

    I wonder if there is something that I am doing wrong terribly.

    Please share your insight.

    Thanks & Regards

    Anu

  • 0 in reply to Anand Kumar6
    Prodigy 150 points

    Hi Krunal,

    I also want to bring to your notice that a similar kind of question was asked by another person in the link below:-

    https://e2e.ti.com/support/processors/f/791/t/709784

    Gerryl has clearly mentioned his problem in snapshots and has also mentioned of the interrupts not getting set.

    "I don't have any of the interrupts enabled, intending simply to poll the done bit in IRQSTATUS_RAW.  But we never get there."

    The thread is locked and there doesn't seem to have a solution posted for this issue.

    Is there any sequence to be followed for DMA in LIDD mode? (I have followed the sequence in AM335x user manual).

    Should some other clocks related to interrupts or Mux be enabled to help with LIDD DMA interrupt triggering?.

    Please share your thoughts.

    Regards

    Anu

  • 0 in reply to Anand Kumar6
    TI__Mastermind 44575 points

    Hi Anu,

    I am checking internally to see if you are missing any other configurations. In the meantime, could you please confirm if the LCDC is sending data or not. Also, make sure the sysconfig is set to smart standby and smart idlemode or no-standby/no-idle mode.

    Regards,
    Krunal 

  • 0 in reply to Krunal Bhargav34
    Prodigy 150 points

    Dear Krunal,

    You cracked it!. Thank you very much.

    By your advise, I configured the SYSCONFIG register and now the interrupt is happening.

    Thank you very much.

    Best Regards

    Anand