Hello,
I've been struggling with a problem for a couple days now. I have a board with the AM3352 chip, and I'm trying to setup U-Boot (in SPI NOR flash) to allow TFTP over EMAC1 (RGMII2). In my system, I have 2 ethernet ports available for a network boot, the first one works, but the second one (RGMII2) does not. I cannot seem to access two PHYs at the same time, so I'm either able to use the first port (which will not be available on the next version of our hardware) or the second port (which doesn't ping or communicate over TFTP).
The RGMII2 PHY is the Micrel KSZ9031. It auto-negotiates to 1000MBPS with my router (have tried multiple routers, multiple cables, etc, all the regular stuff). On Wireshark, I see no traffic across my network (using a static IP). The first ethernet port works perfectly, and I've used it for network boot for months without issue.
Here are my files of interest (based mostly on the am335x set of U-Boot files).
In mux.c:
static struct module_pin_mux rmii1_pin_mux[] = {
{OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS */
{OFFSET(mii1_rxerr), MODE(1) | RXACTIVE}, /* RMII1_RXERR */
{OFFSET(mii1_txen), MODE(1)}, /* RMII1_TXEN */
{OFFSET(mii1_txd1), MODE(1)}, /* RMII1_TXD1 */
{OFFSET(mii1_txd0), MODE(1)}, /* RMII1_TXD0 */
{OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RMII1_RXD1 */
{OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RMII1_RXD0 */
{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
{OFFSET(rmii1_refclk), MODE(0) | RXACTIVE}, /* RMII1_REFCLK */
{-1},
};
static struct module_pin_mux rgmii2_pin_mux[] = {
{OFFSET(gpmc_a0), MODE(2)}, /* (R13) gpmc_a0.rgmii2_tctl */
{OFFSET(gpmc_a1), MODE(2) | RXACTIVE}, /* (V14) gpmc_a1.rgmii2_rctl */
{OFFSET(gpmc_a2), MODE(2)}, /* (U14) gpmc_a2.rgmii2_td3 */
{OFFSET(gpmc_a3), MODE(2)}, /* (T14) gpmc_a3.rgmii2_td2 */
{OFFSET(gpmc_a4), MODE(2)}, /* (R14) gpmc_a4.rgmii2_td1 */
{OFFSET(gpmc_a5), MODE(2)}, /* (V15) gpmc_a5.rgmii2_td0 */
{OFFSET(gpmc_a6), MODE(2)}, /* (U15) gpmc_a6.rgmii2_tclk */
{OFFSET(gpmc_a7), MODE(2) | RXACTIVE}, /* (T15) gpmc_a7.rgmii2_rclk */
{OFFSET(gpmc_a8), MODE(2) | RXACTIVE}, /* (V16) gpmc_a8.rgmii2_rd3 */
{OFFSET(gpmc_a9), MODE(2) | RXACTIVE}, /* (U16) gpmc_a9.rgmii2_rd2 */
{OFFSET(gpmc_a10), MODE(2) | RXACTIVE}, /* (T16) gpmc_a10.rgmii2_rd1 */
{OFFSET(gpmc_a11), MODE(2) | RXACTIVE}, /* (V17) gpmc_a11.rgmii2_rd0 */
{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
{-1},
};
...
// I have also tried commenting rmii1 out, to see if that solves the problem - no luck
...
In board.c, the commented out code shows other permutations of what I've tried:
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_addr = 6,
},
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_addr = 7,
},
};
// static struct cpsw_slave_data cpsw_slaves[] = {
// {
// .slave_reg_ofs = 0x208,
// .sliver_reg_ofs = 0xd80,
// .phy_addr = 6,
// },
// {
// .slave_reg_ofs = 0x308,
// .sliver_reg_ofs = 0xdc0,
// .phy_addr = 7,
// },
// };
static struct cpsw_platform_data cpsw_data = {
.mdio_base = CPSW_MDIO_BASE,
.cpsw_base = CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x800,
.slaves = 2,
.slave_data = cpsw_slaves,
.ale_reg_ofs = 0xd00,
.ale_entries = 1024,
.host_port_reg_ofs = 0x108,
.hw_stats_reg_ofs = 0x900,
.bd_ram_ofs = 0x2000,
.mac_control = (1 << 5),
.control = cpsw_control,
.host_port_num = 0,
.version = CPSW_CTRL_VERSION_2,
};
...
writel(RGMII1_IDMODE | RGMII2_IDMODE |
RMII_CHIPCKL_ENABLE |
GMII1_SEL_RMII | GMII2_SEL_RGMII,
&cdev->miisel);
// writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel);
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
cpsw_slaves[0].phy_addr = 6;
cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII;
//cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII_TXID;
cpsw_slaves[1].phy_addr = 7;
// Need to set active_slave = 1, otherwise, cannot see Micrel PHY
//cpsw_data.active_slave = 0;
cpsw_data.active_slave = 1;
rv = cpsw_register(&cpsw_data);
if (rv < 0)
printf("Error %d registering CPSW switch\n", rv);
else
n += rv;
...
Pertinent defines, whether useful or not:
#define CONFIG_PHY_GIGE #define CONFIG_PHYLIB #define CONFIG_PHY_SMSC #define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL_KSZ9031
#define CONFIG_DRIVER_TI_CPSW
Any help would be greatly appreciated!
- SJ
