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TDA4VM: Is there a support driver for the ethernet daughter board provided with TI TDA4 EVM?

AllenHsu
Intellectual 980 points
Part Number: TDA4VM
Other Parts Discussed in Thread: PCM3168A

Hi

Is there a support driver for the  ethernet daughter board provided with TI TDA4 EVM?

As far as we know, this board uses QSGMII to connect the physical layer and the MAC layer.

We are not sure whether such hardware design will be supported by TI now or in the future.

The picture below is a ethernet daughter board provided with TI TDA4 EVM.

  • 0
    TI__Genius 14680 points

    Allen,

    The QSGMII is not enabled by default with the SDK release. Please refer to https://e2e.ti.com/support/processors/f/791/t/900935, to which I recently posted a document and patches describing how to enable. 

    Best regards,

    Dave

  • 0 in reply to Dave Bell
    Intellectual 980 points

    Hi Dave,

    Thanks for your reply.

    I will first use these patchs you provide for research.

    However, we also want to know which version (PSDK) of these patchs will be officially released.

  • 0 in reply to AllenHsu
    TI__Genius 14680 points

    Allen,

    This would intersect with the next release -- SDK 7.0 end-June.

    Best regards,

    Dave

  • 0 in reply to Dave Bell
    Intellectual 980 points

    Hi Dave,

    I want to ask the whole process of bringing up the QSGMII board. 

    If I want to bring up the QSGMII board,

    should I have to bring up Ethfw first, then Ethfw controls CPSW9G, and then CPSW9G connect with QSGMII daughter board ?

    Is the above process correct?

  • 0 in reply to AllenHsu
    TI__Genius 14680 points

    Allen,

    Yes, the Ethernet firmware is modified per the instructions in the document to include the initialization of the QSGMII and will establish the connection. So loading the firmware occurs first and it will connect to the card after initializing the SerDes and the CPSW9G.

    Best regards,

    Dave

  • 0 in reply to Dave Bell
    Intellectual 980 points

    Hi Dave,

    I use the binary files (QSGMII_patch.7z) in the link bellow which you provide me with, and I can already see the CPSW9G message from the com port.
    The CPSW9G seems to be successfully connected with QSGMII
    e2e.ti.com/.../900935

    CPSW9G message:
    CpswMacPort_enablePort: SGMII Link Parter Config port 4: Link Up: 10-Mbps Full-Duplex
    Cpsw_handleLinkUp: port 4: Link up: 10-Mbps Full-Duplex

    But under the Linux environment, the following error appears.

    root@j7-evm:~# ifconfig eth1 192.168.5.47 netmask 255.255.255.0 up
    [ 35.646954] j721e-cpsw-virt-mac main_r5fss_cpsw9g_virt_mac0: register_ipv4 rpmsg - fail -5

    [ 153.145497] NETDEV WATCHDOG: eth1 (j721e-cpsw-virt-mac): transmit queue 0 timed out
    [ 153.153165] WARNING: CPU: 1 PID: 0 at net/sched/sch_generic.c:466 dev_watchdog+0x29c/0x2a8
    [ 153.161406] Modules linked in: xfrm_user xfrm4_tunnel tunnel4 ipcomp xfrm_ipcomp esp4 ah4 af_key xfrm_algo xhci_plat_hcd xhci_hcd usbcore pru_rproc irq_pruss_intc ti_am335x_adc kfifo_buf rpmsg_char omap_rng rng_core pruss cdns3 roles udc_core crc32_ce crct10dif_ce j721e_cpsw_virt_mac snd_soc_j721e_evm pvrsrvkm(O) ti_k3_r5_remoteproc ntb_hw_epf ti_am335x_tscadc ntb pruss_soc_bus mhdp8546 pci_endpoint_test sa2ul videobuf2_dma_sg sha512_generic authenc ti_k3_dsp_remoteproc virtio_rpmsg_bus remoteproc cdns3_ti snd_soc_pcm3168a_i2c snd_soc_pcm3168a rti_wdt sch_fq_codel rpmsg_kdrv_switch jailhouse(O) cryptodev(O) cmemk(O) ipv6
    [ 153.216317] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G O 4.19.94-g5a23bc00e0 #1
    [ 153.224731] Hardware name: Texas Instruments K3 J721E SoC (DT)

    [ 159.028890] j721e-cpsw-virt-mac main_r5fss_cpsw9g_virt_mac0 eth1: txq:0 DRV_XOFF:0 tmo:14172 dql_avail:-14 free_desc:254

    Can you give me some directions to help me solve this problem?

  • 0 in reply to AllenHsu
    TI__Genius 14680 points

    Allen,

    Can you confirm the console printout from the Ethernet Firmware? Are you seeing the links up and initialized as shown in the document (page 1)?

    Best regards,

    Dave

  • 0 in reply to Dave Bell
    Intellectual 980 points

    Hi Dave,

    I provide you with two files, I don't know if it helps debug.

    1. cpsw9g.log: These messages are from ethfw.

    2. QSGMII_dmesg.log: These messages are from Linux dmesg.

    QSGMII_dmesg.log
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    [BEGIN] 2020/5/19 �U�� 01:16:22
    [ 159.028655] j721e-cpsw-virt-mac main_r5fss_cpsw9g_virt_mac0 eth1: txq:0 DRV_XOFF:0 tmo:26972 dql_avail:-346 free_desc:251
    root@j7-evm:~# ifconfig eth1 192.168.5.47 netmask 255.255.255.0 up
    root@j7-evm:~# dmesg
    [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd080]
    [ 0.000000] Linux version 4.19.94-g5a23bc00e0 (oe-user@oe-host) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #1 SMP PREEMPT Fri Feb 7 09:45:50 UTC 2020
    [ 0.000000] Machine model: Texas Instruments K3 J721E SoC
    [ 0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
    [ 0.000000] bootconsole [ns16550a0] enabled
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a0000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-memory@a0100000, compatible id shared-dma-pool
    [ 0.000000] Rese[ 163.892658] j721e-cpsw-virt-mac main_r5fss_cpsw9g_virt_mac0 eth1: txq:0 DRV_XOFF:0 tmo:31836 dql_avail:-346 free_desc:251
    rved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a1000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-memory@a1100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a2000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-memory@a2100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a3000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a3000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a3100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-memory@a3100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a4000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a4000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a4100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-memory@a4100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a5000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a5000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a5100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node r5f-memory@a5100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a6000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node c66-dma-memory@a6000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a6100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node c66-memory@a6100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a7000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node c66-dma-memory@a7000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a7100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node c66-memory@a7100000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a8000000, size 1 MiB
    [ 0.000000] OF: reserved mem: initialized node c71-dma-memory@a8000000, compatible id shared-dma-pool
    [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a8100000, size 15 MiB
    [ 0.000000] OF: reserved mem: initialized node c71-memory@a8100000, compatible id shared-dma-pool
    [ 0.000000] cma: Reserved 512 MiB at 0x00000000c0000000
    [ 0.000000] On node 0 totalpages: 62400
    [ 0.000000] DMA32 zone: 29 pages used for memmap
    [ 0.000000] DMA32 zone: 0 pages reserved
    [ 0.000000] DMA32 zone: 29632 pages, LIFO batch:3
    [ 0.000000] Normal zone: 32 pages used for memmap
    [ 0.000000] Normal zone: 32768 pages, LIFO batch:3
    [ 0.000000] psci: probing for conduit method from DT.
    [ 0.000000] psci: PSCIv1.1 detected in firmware.
    [ 0.000000] psci: Using standard PSCI v0.2 function IDs
    [ 0.000000] psci: Trusted OS migration not required
    [ 0.000000] psci: SMC Calling Convention v1.1
    [ 0.000000] random: get_random_bytes called from start_kernel+0x94/0x3e4 with crng_init=0
    [ 0.000000] percpu: Embedded 2 pages/cpu s48536 r8192 d74344 u131072
    [ 0.000000] pcpu-alloc: s48536 r8192 d74344 u131072 alloc=2*65536
    [ 0.000000] pcpu-alloc: [0] 0 [0] 1
    [ 0.000000] Detected PIPT I-cache on CPU0
    [ 0.000000] CPU features: enabling workaround for EL2 vector hardening
    [ 0.000000] Speculative Store Bypass Disable mitigation not required
    [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 62339
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    cpsw9g.log
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    [BEGIN] 2020/5/19 �U�� 01:20:22
    Enabling clocks for CPSW_9G!
    =======================================================
    CPSW Ethernet Firmware Demo
    =======================================================
    ETHFW Version: 0. 1. 1
    ETHFW Build Date (YYYY/MMM/DD):2020/Apr/30
    ETHFW Commit SHA:ETHFW PermissionFlag:0x1ffffff, UART Connected:true,UART Id:2IPC_echo_test (core : mcu2_0) .....
    CPSW_9G Test on MAIN NAVSS
    Remote demo device (core : mcu2_0) .....
    CpswPhy_bindDriver: PHY 16: OUI:0001c1 Model:27 Ver:00 <-> 'vsc8514' : OK
    CpswPhy_bindDriver: PHY 17: OUI:0001c1 Model:27 Ver:00 <-> 'vsc8514' : OK
    CpswPhy_bindDriver: PHY 18: OUI:0001c1 Model:27 Ver:00 <-> 'vsc8514' : OK
    CpswPhy_bindDriver: PHY 19: OUI:0001c1 Model:27 Ver:00 <-> 'vsc8514' : OK
    PHY 16 is alive
    PHY 17 is alive
    PHY 18 is alive
    PHY 19 is alive
    Host MAC address: 70:ff:76:1d:8f:85
    [NIMU_NDK] CPSW has been started successfully
    CpswMacPort_enablePort: SGMII Link Parter Config port 4: Link Up: 100-Mbps Full-Duplex
    Cpsw_handleLinkUp: port 4: Link up: 100-Mbps Full-Duplex
    REMOTE_SERVICE: Init ... !!!
    REMOTE_SERVICE: Init ... Done !!!
    Function:CpswProxyServer_attachExtHandlerCb,HostId:0,CpswType:1
    Function:CpswProxyServer_registerMacHandlerCb,HostId:0,Handle:a2cee474,CoreKey:38acb7e6, MacAddress:70:ff:76:1d:8f:84, FlowIdx:172, FlowIdxOffset:0
    Cpsw_ioctlInternal: CPSW: Registered MAC address.ALE entry:10, Policer Entry:0Function:CpswProxyServer_registerIpv4MacHandlerCb,HostId:0,Handle:a2cee474,CoreKey:38acb7e6, MacAddress:70:ff:76:1d:8f:84 IPv4Addr:192.168.5.47
    Failed to add Static ARP Entry
    ================LLI Table entries===========
    Number of Static ARP Entries: 0
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Q：Can you confirm the console printout from the Ethernet Firmware? Are you seeing the links up and initialized as shown in the document (page 1)?

    A：which document is it ?

  • 0 in reply to AllenHsu
    Intellectual 980 points

    Hi Dave,

    Does TI have a direction?

    We urgently need to verify whether the QSGMII board can be used as a network expansion.

    Looking forward to your reply, thank you.

  • 0 in reply to AllenHsu
    Intellectual 980 points

    Hi Dave,

    The following file is our current uboot-env that we use to test QSGMII, which is also set up by following this link.

    e2e.ti.com/.../900935

    QSGMII_uboot_env.log
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    [BEGIN] 2020/5/21 �W�� 11:11:40
    print
    arch=arm
    args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 ${mtdparts}
    args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype}
    args_ufs=setenv devtype scsi;setenv bootpart 1:1;run ufs_finduuid;setenv bootargs console = ${console} ${optargs}root=PARTUUID=${uuid} rw rootfstype=${scsirootfstype};setenv devtype scsi;setenv bootpart 1:1
    baudrate=115200
    board=j721e
    board_name=J721EX-PM2-SOM
    board_rev=E7
    board_serial=0291
    board_software_revision=01
    boot=mmc
    boot_fit=0
    boot_rprocs=if test ${dorprocboot} -eq 1 && test ${boot} = mmc; then rproc init;run boot_rprocs_mmc;fi;
    boot_rprocs_mmc=env set rproc_id;env set rproc_fw;for i in ${rproc_fw_binaries} ; do if test -z "${rproc_id}" ; then env set rproc_id $i;else env set rproc_fw $i;run rproc_load_and_boot_one;env set rproc_id;env set rproc_fw;fi;done
    bootargs=androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=j721eboard
    bootcmd=run findfdt; setenv mmcdev 1; run init_${boot}; run load_ethfw; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern
    bootdelay=2
    bootdir=/boot
    bootenvfile=uEnv.txt
    bootpart=1:2
    bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr}
    check_android=setenv mmcdev 0; env delete boot_start; part start mmc ${mmcdev} boot boot_start; if test "$boot_start" = ""; then env set is_android 0; else env set is_android 1; fi; env delete boot_start
    check_dofastboot=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; env save; echo Booting into fastboot ...; fastboot 0; fi
    console=ttyS2,115200n8
    cpu=armv8
    dfu_alt_info_emmc=rawemmc raw 0 0x800000 mmcpart 1;rootfs part 0 1 mmcpart 0;tiboot3.bin.raw raw 0x0 0x400 mmcpart 1;tispl.bin.raw raw 0x400 0x1000 mmcpart 1;u-boot.img.raw raw 0x1400 0x2000 mmcpart 1;u-env.raw raw 0x3400 0x100 mmcpart 1;sysfw.itb.raw raw 0x3600 0x800 mmcpart 1
    dfu_alt_info_mmc=boot part 1 1;rootfs part 1 2;tiboot3.bin fat 1 1;tispl.bin fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1;sysfw.itb fat 1 1
    dfu_alt_info_ospi=tiboot3.bin raw 0x0 0x080000;tispl.bin raw 0x080000 0x200000;u-boot.img raw 0x280000 0x400000;u-boot-env raw 0x680000 0x020000;sysfw.itb raw 0x6c0000 0x100000;rootfs raw 0x800000 0x3800000
    dfu_alt_info_ram=tispl.bin ram 0x80080000 0x100000;u-boot.img ram 0x81000000 0x100000
    dfu_bufsiz=0x20000
    dorprocboot=0
    emmc_android_boot=echo Trying to boot Android from eMMC ...; run update_to_fit; setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 0; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} boot boot_start; part size mmc ${mmcdev} boot boot_size; mmc read ${fit_loadaddr} ${boot_start} ${boot_size}; run get_overlaystring; run run_fit
    envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi;
    eth1addr=70:ff:76:1d:8f:84
    eth2addr=70:ff:76:1d:8f:85
    eth3addr=70:ff:76:1d:8f:86
    eth4addr=70:ff:76:1d:8f:87
    ethaddr=50:51:a9:71:ca:07
    fdtaddr=0x82000000
    fdtcontroladdr=fdec0d08
    fileaddr=82000000
    filesize=94afb0
    findfdt=if test $board_name = J721EX-PM2-SOM; then setenv fdtfile k3-j721e-common-proc-board.dtb; fi;if test $board_name = J721EX-PM1-SOM; then setenv fdtfile k3-j721e-proc-board-tps65917.dtb; fi;setenv overlay_files ${name_overlays}
    finduuid=part uuid mmc ${bootpart} uuid
    fit_bootfile=fitImage
    fit_loadaddr=0x90000000
    get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}
    get_fdt_ufs=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}
    get_kern_mmc=load mmc ${bootpart} ${loadaddr} ${bootdir}/${name_kern}
    get_kern_ufs=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${name_kern}
    get_overlay_mmc=fdt address ${fdtaddr};fdt resize 0x100000;for overlay in $overlay_files;do;load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && fdt apply ${overlayaddr};done;
    get_overlay_ufs=fdt address ${fdtaddr};fdt resize 0x100000;for overlay in $name_overlays;do;load scsi ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && fdt apply ${overlayaddr};done;
    get_overlaystring=for overlay in $overlay_files;do;setenv overlaystring ${overlaystring}'#'${overlay};done;
    importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize}
    init_mmc=run args_all args_mmc
    init_ufs=ufs init; scsi scan; run args_ufs
    load_ethfw=load mmc 1:2 0x82000000 /lib/firmware/app_remoteswitchcfg_server.xer5f;rproc init;rproc load 2 0x82000000 ${filesize};rproc start 2
    loadaddr=0x80080000
    loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
    loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr
    loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}
    loadfit=run args_mmc; run run_fit;
    loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}
    mainr5f0_0fwname=/lib/firmware/j7-main-r5f0_0-fw
    mainr5f0_0loadaddr=88000000
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    root@j7-evm:~# lspci
    0000:00:00.0 Non-VGA unclassified device: Texas Instruments Device b00d
    0001:00:00.0 Non-VGA unclassified device: Texas Instruments Device b00d

  • 0 in reply to AllenHsu
    Intellectual 980 points

    Hi Dave,

    The CPSW9G has the following error.

    Failed to add Static ARP Entry

    ================LLI Table entries===========

    Number of Static ARP Entries: 0

    SNo. IP Address MAC Address
    ------ ------------- ---------------

  • 0 in reply to AllenHsu
    TI__Genius 14680 points

    Allen,

    1) Please confirm if DHCP is enabled or disabled? If DHCP is enabled, then please note that we have an issues when a remote core gets an IP address before the Switch R5F gets its IP. To avoid, you must ensure the Switch R5F is assigned an IP address first.

    2) Could you share full EthFw UART logs as well? Make sure that the Linux IP and EthFw IP are in the same subnet.

    See http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/ethfw/docs/user_guide/demo_ethfw_combined_top.html  under Demo Setup 

    3)
    Link parameters doesn’t look quite correct. While 10-Mbps full-duplex is a valid speed/duplexity, it’s not common and typically indicates some problem during link establishment.
    > CpswMacPort_enablePort: SGMII Link Parter Config port 4: Link Up: 10-Mbps Full-Duplex
    > Cpsw_handleLinkUp: port 4: Link up: 10-Mbps Full-Duplex

    But this is not likely causing the issue.

    Best regards,

    Dave

  • 0 in reply to Dave Bell
    Intellectual 980 points

    Hi Dave,

    Thanks for your reply.

    Where can I find the messages which indicate that the EthFw have already gotten the IP from DHCP.

  • 0 in reply to AllenHsu
    TI__Guru** 113810 points

    Allen,

    The messages from the EthFw for IP address from DHCP can be seen from the MCU2_0 logs.

    The user guide explains this, please refer to http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/ethfw/docs/user_guide/demo_ethfw_combined_top.html and search for the "Sample Output" section.

    Regards

    Karthik