CCS/TMS320C6652: SPI BOOT issue

Divy

Intellectual 380 points

Part Number: TMS320C6652

Tool/software: Code Composer Studio

Hi,

We designed a custom board with TMS320C6652,not using DDR in our board. SPI Flash used is MT25QU128ABA1ESE

SPI NOR flash boot is not working in the board.

We verified the following

1. DSP power on and reset sequencing

2. No activity is observed on MISO line during boot up.

3.TI eval board and proto board behavior during power up.Except MISO SPI boot sequence are similar.

4. Verified custom board in No Boot mode -Connecting to CCS initializes all the PLL and memory similar to Eval board.

5. In No boot mode , SW is able to read /write to flash.

7. Please find the nysh.spi.map. CORE clk is 100Mhz in custom board. Please confirm the settings below.

section {

boot_mode = 50
param_index = 0
options = 1
core_freq_mhz = 600
exe_file = "spiboot.i2c.ccs"
next_dev_addr_ext = 0x0
sw_pll_prediv = 1
sw_pll_mult = 12
sw_pll_postdiv = 2
sw_pll_flags = 1
addr_width = 24
n_pins = 4
csel = 0
mode = 0
c2t_delay = 4
bus_freq_mhz = 0
bus_freq_khz = 500
}

Please guide us to understand the issue.

Regards,

Divya

over 5 years ago

0 dzhou over 5 years ago

TI__Genius 9065 points

Hello Divya,

Is this the same issue as the following one?

https://e2e.ti.com/support/processors/f/791/p/891006/3341351#3341351

best regards,

David Zhou

0 Divy over 5 years ago in reply to dzhou

Intellectual 380 points

Hi David,

Same issue. DSP RBL is not working properly.

In No boot mode, all the DSP peripherals(tested SPI, McBSP, I2C, UART) works fine.

Please guide to resolve this issue.

could you please share official mail ID. I shall share the power sequencing , and reset waveforms captured.

Regards,

Divya

0 dzhou over 5 years ago in reply to Divy

TI__Genius 9065 points

Divya,

With all earlier debugging options exhausted, there are still ways to continue debug this issue:

Either 1) we share the ROM code, but this would need NDA in place;

Or: 2) You send us a custom board to investigate.

Do you have any preference?

best regards,

David Zhou

0 Divy over 5 years ago in reply to dzhou

Intellectual 380 points

Hi David,

We have NDA signed with TI. Please share the ROM code.

We are trying to get the local TI support.

Can you please confirm that PCIECLK pin should be held static during the boot process? Since PCICLK pins are reserved in C6652 , these pins are left floating.

In earlier discussion with TI, mentioned only about the CORECLK and DDRCLK which we have taken care in design.

PCIEN pin is low and PCI mode pins are high at Boot up. These pins are also left floating in custom design

Regards,

Divya

0 dzhou over 5 years ago in reply to Divy

TI__Genius 9065 points

Divya,

Please download source code here. C6652 ROM image is same as C6657.

http://software-dl.ti.com/sdoemb/sdoemb_public_sw/rbl/1_0_C6657/index_FDS.html

best regards,

David Zhou

0 dzhou over 5 years ago in reply to dzhou

TI__Genius 9065 points

Hello,

I am closing this E2E since the root cause is wrong SPI mode[polarity/phase] setting in boot pins.

best regards,

David Zhou

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CCS/TMS320C6652: SPI BOOT issue