Hello,
I have a question about DMA. (This does NOT negate the other question I posted, which as of today, still does not have an answer).
I have a simple DMA/SPI project that simply takes a buffer, and DMA transfers it to the SPI_0 TX register, using a type A transfer (acnt = 1, bcnt = 0x100, increment source, does not increment destination). The goal is to simply transfer a block of data via SPI, then stop. And eventually, another block will be transferred later.
First, I discovered that the SPI module will not assert the next SPI TX event unless the RX register has also been read. Although this is not explained anywhere I can find, I suppose it does make sense.
At the end of the transfer which appears to work fine, the interrupt 12 fires. This is way the EDMA has been set, and is expected.
Then interrupt 14 fires, I suppose this is also expected, as the PaRAM set has become a NULL set, and the SPI module still fired a SPITEVT0 since it doesn't know. So all that should be needed is to disable the DMAW flags in the SPI, and disable some flags in the EMDA.
The problem is interrupt 14 will NOT stop firing.
It fires over and over and over, starving the CPU of anything else. Absolutely nothing else can execute!
I've disabled the SPI channel, disabled the SPI DMAW/DMAR flags, disabled the DMA event interrupt, cleared the DMA interrupt flags for the channels, cleared the secondary events, cleared the missed events, disabled the DMA events for those channels... About the only thing left is to pull the power plug!
I've put those steps in the DMA completed handler (interrupt 12) which fires when the PaRAM set goes to NULL, as well as in the DMA Error interrupt handler (interrupt 14). Inspection of the DMA registers on a breakpoint indicate that all those flags have been cleared and disabled. But it just won't stop firing...
The manual section 11.3.4.1.2 clearly says:
If the PaRAM set associated with the channel is a NULL set (see Section 11.3.3.3), then no transfer request (TR) is submitted and the corresponding En bit in ER is cleared and simultaneously the corresponding channel bit is set in the event miss register (EMR.En = 1) to indicate that the event was discarded due to a null TR being serviced. Good programming practices should include clearing the event missed error before re-triggering the DMA channel
Well, that step is being executed. Along with clearing the EMR and CCERR indicators (as indicated in section 11.3.9.4)
So how/why is the EDMA error interrupt 14 being fired when ALL of the flags for it have been turned off and/or acknowledged?
The ENTIRE project is attached. The low level control of the EDMA module is adapted from the older starterware, but all the source is included in the project.
Any help would be appreciated.
