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TDA4VM: query for the relation between MCU, MPU and VPAC, DMPAC.

Minwoo Song
Intellectual 990 points
Part Number: TDA4VM

Hi TI,

I have questions for the relation between { CR5F (MCU), A72 (MPU) core} and { VPAC, DMPAC} operation.

please check below q1, q2, q3: 

q1) is there any dependency to operate interrupt of VPAC with MCU or MPU core ? 

- eg> for only CR5F, can MCU receive interrupt of VAPC or DMPAC ? (instead MPU) 

q2) (instead MPU A72), can MCU only control (running or stopping or setting-resister) for VPAC or DMPAC ? 

q3) in below link, I saw the sentence, it seems like, MCU (CR5F) has only role to control VPAC, DMPAC, and I ask you for clearance. 

"A72 is the Main "Big" ARMs that are running the HLOS, typically. IPU is the R5F "Small" MCU type arms which are running RTOS and are mainly used for controlling the hardware accelerators with low latency interrupts, but can also be used for some compute. The VPAC_/DMPAC_ are targets that represent tasks (threads) reserved for running the VPAC and DMPAC hardware accelerators." 

// e2e.ti.com/.../3305507

Thanks

  • 0
    TI__Guru**** 451145 points

    Hi Minwoo Sing,

    Please find answers to your questions below.

    1, VPAC & DMPAC modules are not supported on MPU, they are supported only on one of the R5F (MCU)

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Intellectual 990 points

    Hi Brijesh,

    Very thanks for your answer.

    I wanna see more detail description for this,

    would you please let me know related material for this ?
    ("1, VPAC & DMPAC modules are not supported on MPU, they are supported only on one of the R5F (MCU)") 

    I will check the material in detail. 

    Regards,

  • 0 in reply to Minwoo Song
    TI__Guru**** 451145 points

    Hello Mingwoo Song,

    Please refer to below statement in documentation.. HW accelerators VPAC and DMPACs are available on R5F..

    A72 is the Main "Big" ARMs that are running the HLOS, typically. IPU is the R5F "Small" MCU type arms which are running RTOS and are mainly used for controlling the hardware accelerators with low latency interrupts, but can also be used for some compute. The VPAC_/DMPAC_ are targets that represent tasks (threads) reserved for running the VPAC and DMPAC hardware accelerators.

    Regards,

    Brijesh