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AM4372: DDR3 test

Guru 10085 points
Part Number: AM4372

Hi Sitara Support Team,

My customer tried testing for DDR3, and he is facing some fails.
Here are the test details.

-Custome Board: AM4372 + DDR3; IS43TR82560C

-DDR3 Datasheet:
www.issi.com/.../43-46TR16128C-82560CL.pdf

-Test Tool: U7231B DDR3 and LPDDR3 Compliance Test Application for Infiniium Series Oscilloscopes

-EMIF spreadsheet: SPRAC70_AM437x_EMIF_Configuration_Tool_V20_20200717.xlsx

-Test results: DDR3 Device 1 Results.pdf

Questions;
1. tWPRE, tRPRE, SlewRate (SingleEnd), the results are quite different for the standard.
Is it possible to adjust tWPRE and tRPRE on the CPU?

2. Is it safe to assume that SlewRate has enough margin in Differential results
that the following results are still operationally acceptable?

****************************************************************************************************
SRQseFReference: JEDEC Standard No. 79-3F, Table 33
Test Summary: FAIL Test Description: Output signal minimum falling slew rate
Pass Limits:[2.500000000000 V/ns to 5.000000000000 V/ns]SRQseR (Last of 2 Trials)1.350642000000 V/ns
****************************************************************************************************


Best regards,
Kanae

  • Hi Kanae, preambles are not adjustable in the controller.  I'm not sure why slew rates tests are failing.  Ensure that the customer followed all the DDR design guidelines in the AM437x datasheet.  Is the design a T-topology (2 16bit DDRs in T formation) or fly-by topology.  Was VTT termination used on addr/ctrl signals?

    Also, i can't tell from the diagrams, are these tests measured during a read or write?  Where along the signal are these measurements taken (ie, where is the probe point?)

    Regards,

    james

  • Hi James,

    I appreciate your reply.
    I will check your questions.

    Thank you for your continued support.

    Best regards,
    Kanae