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Original question:

CCS/CCSTUDIO: CCS V9.3.0 does not seem to support TMDSEVM6657LS Evaluation Module

CCS/CCSTUDIO: Need support on interrupt architecture for the TMS320C6657 DSP under CCS v9.3.0

James Eno54
Intellectual 310 points
Part Number: CCSTUDIO
Other Parts Discussed in Thread: TMS320C6657

Tool/software: Code Composer Studio

I am trying to get my TMDSEVM6657LS Evaluation Module up and running under CCS v9.3.0. I created a project and integrated the cpintc_test file found in the examples folder of the pdk_c665x_2_0_16 development package (pdk_c665x_2_0_16/packages/ti/csl/example/cpincc). I want to verify basic interrupt operation. I doesn't work, the interrupts are not being serviced. The interrupt architecture is complicated in the TMS320C6657 device. It has 4 interrupt controllers ( a CorePac interrupt controller and 3 chip-level interrupt controllers)  and a few DSP internal core interrupt service related registers.

I have read documents SPRS814D, SPRUGW0C & SPRUGW4A (C6657 Data Sheet, CorePac User Guide, and CIC User Guide). The 'cpintc_test.c' file seems to be referencing some GEM_INTC controller configuration. It does not seem to be referencing the registers outlined in the CorePac User Guide Interrupt Controller section. When loading and debugging the project, CCS v9.3.0 does not display any of the CorePac Interrupt Controller registers under the 'registers' pull down tab. The chip-level CIC Interrupt Controllers (all 3) do show up. Documentation on the interrupt architecture is poor.

1) Are there any example projects that illustrate full interrupt handling for the TMS320C6657 DSP?

2) Why doesn't CCS v9.3.0 display the CorePac Interrupt Controller registers that are part of the TMS320C6657 DSP?

  • 0
    TI__Guru* 95265 points

    Hi,

    The pdk_c665x_2_0_xx\packages\ti\csl\example\cpintc\cpintc_test.c is intended to test on C6678. As you saw:

    /* Open the INTC Module for Vector ID: 4 and Event ID: 63 (C6678) 59 (C6670)
    * Refer to the interrupt architecture and mapping document for the Event ID (INTC0_OUT3)*/
    vectId = CSL_INTC_VECTID_4;
    hTest = CSL_intcOpen (&intcObj, 63, &vectId , NULL);
    if (hTest == NULL)
    {
    printf("Error: GEM-INTC Open failed\n");
    return;
    }

    In C6678, from the datasheet:

    63 CIC0_OUT(3+8*n)7 Or CIC1_OUT(3+8*(n-4))7 Interrupt Controller output

    This is CIC0_OUT3. 

    To make it work on C6657,  you need to look at C6657 datasheet. Section 6.9, 

    25 CIC0_OUT(3+20*n)(8) Interrupt Controller Output

    You need to change this to 25 and try again. 

    For the interrupt, please refer to this document: 

    The CCS register views doesn't show all the registers. For the interrupt case, it shows INTC0/1/2, please use memory browser to look at additional registers.

    Regards, Eric

  • 0 in reply to lding
    Intellectual 310 points

    Eric,

    Thanks for the fast and thorough response. It works now (amazing how one number can make such a difference). You have added clarity to my understanding of DSP interrupt handling. I'll be moving on to mapping the UPP interrupt source per my project requirements.Thanks again.