Original question:
Hi,
While try to run our 4 task network openvx application on EVM, getting memory issue.
Same network runs fine on EVM standalone and OpenVX application on PC simulation.
Hi Mukilan,
To get an updated memory map, please follow steps below,
1. Downlaod the attachment "0001-MEM_MAP-Updating-memory-map-to-make-space-for-larger.patch" and apply it on a fresh install of PSDKRA 7.2
ti-processor-sdk-rtos-j721e-evm-07_02_00_06/vision_apps$ git apply 0001-MEM_MAP-Updating-memory-map-to-make-space-for-larger.patch
2. Download the attachment "k3-j721e-vision-apps.dtso" and replace the existing one in PSDKLA 7.2. Do take a back up before replacing.
ti-processor-sdk-linux-j7-evm-07_02_00_07/board-support/linux-5.4.74+gitAUTOINC+9574bba32a-g9574bba32a/arch/arm64/boot/dts/ti
3. Build vision_apps with updated memory map and install updated binaries to SD card
4. Build linux dtbs and install new dtb's to SD card as mentioned in this developer notes
Please try these steps and let me know if the allocation goes through. Do test some existing out of the box demos after making changes. The updated memory map is also attached for your reference.
Regards,
Shyamhttps://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/k3_2D00_j721e_2D00_vision_2D00_apps.dtsohttps://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/0001_2D00_MEM_5F00_MAP_2D00_Updating_2D00_memory_2D00_map_2D00_to_2D00_make_2D00_space_2D00_for_2D00_larger.patch
<!DOCTYPE html>
<html>
<style type="text/css">
.tg {border-collapse:collapse;border-spacing:0;border-color:#999;}
.tg td{font-family:Arial, sans-serif;font-size:14px;padding:10px 5px;border-style:solid;border-width:1px;overflow:hidden;word-break:normal;border-color:#999;color:#444;background-color:#F7FDFA;}
.tg th{font-family:Arial, sans-serif;font-size:14px;font-weight:normal;padding:10px 5px;border-style:solid;border-width:1px;overflow:hidden;word-break:normal;border-color:#999;color:#fff;background-color:#26ADE4;}
.tg .tg-kftd{background-color:#efefef;text-align:left;vertical-align:top}
.tg .tg-6sgx{background-color:#ffffff;text-align:left;vertical-align:top}
.tg .tg-fjir{background-color:#343434;color:#ffffff;text-align:left;vertical-align:top}
</style>
<head>
<title>System Memory Map for Linux+RTOS mode</title>
</head>
<body>
<h1>System Memory Map for Linux+RTOS mode</h1>
<p>Note, this file is auto generated using PyTI_PSDK_RTOS tool</p>
<table class="tg">
<tr>
<th class="tg-fjir">Name</th>
<th class="tg-fjir">Start Addr</th>
<th class="tg-fjir">End Addr</th>
<th class="tg-fjir">Size </th>
<th class="tg-fjir">Attributes</th>
<th class="tg-fjir">Description</th>
</tr>
<tr>
<td class="tg-kftd">L2RAM_C66x_1</td>
<td class="tg-kftd">0x00800000</td>
<td class="tg-kftd">0x00837FFF</td>
<td class="tg-kftd">224.00 KB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">L2 for C66x_1</td>
</tr>
<tr>
<td class="tg-6sgx">L2RAM_C66x_2</td>
<td class="tg-6sgx">0x00800000</td>
<td class="tg-6sgx">0x00837FFF</td>
<td class="tg-6sgx">224.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">L2 for C66x_2</td>
</tr>
<tr>
<td class="tg-kftd">MAIN_OCRAM_MCU2_0</td>
<td class="tg-kftd">0x03600000</td>
<td class="tg-kftd">0x0361FFFF</td>
<td class="tg-kftd">128.00 KB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">Main OCRAM for MCU2_0</td>
</tr>
<tr>
<td class="tg-6sgx">MAIN_OCRAM_MCU2_1</td>
<td class="tg-6sgx">0x03620000</td>
<td class="tg-6sgx">0x0363FFFF</td>
<td class="tg-6sgx">128.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">Main OCRAM for MCU2_1</td>
</tr>
<tr>
<td class="tg-kftd">L2RAM_C7x_1</td>
<td class="tg-kftd">0x64800000</td>
<td class="tg-kftd">0x64877FFF</td>
<td class="tg-kftd">480.00 KB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">L2 for C7x_1</td>
</tr>
<tr>
<td class="tg-6sgx">L1RAM_C7x_1</td>
<td class="tg-6sgx">0x64E00000</td>
<td class="tg-6sgx">0x64E03FFF</td>
<td class="tg-6sgx">16.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">L1 for C7x_1</td>
</tr>
<tr>
<td class="tg-kftd">MSMC_MPU1</td>
<td class="tg-kftd">0x70000000</td>
<td class="tg-kftd">0x7001FFFF</td>
<td class="tg-kftd">128.00 KB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">MSMC reserved for MPU1 for ATF</td>
</tr>
<tr>
<td class="tg-6sgx">MSMC_C7x_1</td>
<td class="tg-6sgx">0x70020000</td>
<td class="tg-6sgx">0x707E7FFF</td>
<td class="tg-6sgx"> 7.78 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">MSMC for C7x_1</td>
</tr>
<tr>
<td class="tg-kftd">MSMC_DMSC</td>
<td class="tg-kftd">0x707F0000</td>
<td class="tg-kftd">0x707FFFFF</td>
<td class="tg-kftd">64.00 KB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">MSMC reserved for DMSC IPC</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU1_0_IPC</td>
<td class="tg-6sgx">0xA0000000</td>
<td class="tg-6sgx">0xA00FFFFF</td>
<td class="tg-6sgx">1024.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU1_0 for Linux IPC</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU1_0_RESOURCE_TABLE</td>
<td class="tg-kftd">0xA0100000</td>
<td class="tg-kftd">0xA01003FF</td>
<td class="tg-kftd">1024 B</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU1_0 for Linux resource table</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU1_0</td>
<td class="tg-6sgx">0xA0100400</td>
<td class="tg-6sgx">0xA0FFFFFF</td>
<td class="tg-6sgx">15.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU1_0 for code/data</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU1_1_IPC</td>
<td class="tg-kftd">0xA1000000</td>
<td class="tg-kftd">0xA10FFFFF</td>
<td class="tg-kftd">1024.00 KB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU1_1 for Linux IPC</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU1_1_RESOURCE_TABLE</td>
<td class="tg-6sgx">0xA1100000</td>
<td class="tg-6sgx">0xA11003FF</td>
<td class="tg-6sgx">1024 B</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU1_1 for Linux resource table</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU1_1</td>
<td class="tg-kftd">0xA1100400</td>
<td class="tg-kftd">0xA1FFFFFF</td>
<td class="tg-kftd">15.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU1_1 for code/data</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU2_0_IPC</td>
<td class="tg-6sgx">0xA2000000</td>
<td class="tg-6sgx">0xA20FFFFF</td>
<td class="tg-6sgx">1024.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU2_0 for Linux IPC</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU2_0_RESOURCE_TABLE</td>
<td class="tg-kftd">0xA2100000</td>
<td class="tg-kftd">0xA21003FF</td>
<td class="tg-kftd">1024 B</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU2_0 for Linux resource table</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU2_0</td>
<td class="tg-6sgx">0xA2100400</td>
<td class="tg-6sgx">0xA3FFFFFF</td>
<td class="tg-6sgx">31.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU2_0 for code/data</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU2_1_IPC</td>
<td class="tg-kftd">0xA4000000</td>
<td class="tg-kftd">0xA40FFFFF</td>
<td class="tg-kftd">1024.00 KB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU2_1 for Linux IPC</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU2_1_RESOURCE_TABLE</td>
<td class="tg-6sgx">0xA4100000</td>
<td class="tg-6sgx">0xA41003FF</td>
<td class="tg-6sgx">1024 B</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU2_1 for Linux resource table</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU2_1</td>
<td class="tg-kftd">0xA4100400</td>
<td class="tg-kftd">0xA5FFFFFF</td>
<td class="tg-kftd">31.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU2_1 for code/data</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU3_0_IPC</td>
<td class="tg-6sgx">0xA6000000</td>
<td class="tg-6sgx">0xA60FFFFF</td>
<td class="tg-6sgx">1024.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU3_0 for Linux IPC</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU3_0_RESOURCE_TABLE</td>
<td class="tg-kftd">0xA6100000</td>
<td class="tg-kftd">0xA61003FF</td>
<td class="tg-kftd">1024 B</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU3_0 for Linux resource table</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU3_0</td>
<td class="tg-6sgx">0xA6100400</td>
<td class="tg-6sgx">0xA6FFFFFF</td>
<td class="tg-6sgx">15.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU3_0 for code/data</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU3_1_IPC</td>
<td class="tg-kftd">0xA7000000</td>
<td class="tg-kftd">0xA70FFFFF</td>
<td class="tg-kftd">1024.00 KB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU3_1 for Linux IPC</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU3_1_RESOURCE_TABLE</td>
<td class="tg-6sgx">0xA7100000</td>
<td class="tg-6sgx">0xA71003FF</td>
<td class="tg-6sgx">1024 B</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU3_1 for Linux resource table</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU3_1</td>
<td class="tg-kftd">0xA7100400</td>
<td class="tg-kftd">0xA7FFFFFF</td>
<td class="tg-kftd">15.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU3_1 for code/data</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C66x_2_IPC</td>
<td class="tg-6sgx">0xA8000000</td>
<td class="tg-6sgx">0xA80FFFFF</td>
<td class="tg-6sgx">1024.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for C66x_2 for Linux IPC</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C66x_1_RESOURCE_TABLE</td>
<td class="tg-kftd">0xA8100000</td>
<td class="tg-kftd">0xA81003FF</td>
<td class="tg-kftd">1024 B</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for C66x_1 for Linux resource table</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C66x_1_BOOT</td>
<td class="tg-6sgx">0xA8200000</td>
<td class="tg-6sgx">0xA82003FF</td>
<td class="tg-6sgx">1024 B</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for C66x_1 for boot section</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C66x_1</td>
<td class="tg-kftd">0xA8200400</td>
<td class="tg-kftd">0xA8FFFFFF</td>
<td class="tg-kftd">14.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for C66x_1 for code/data</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C66x_1_IPC</td>
<td class="tg-6sgx">0xA9000000</td>
<td class="tg-6sgx">0xA90FFFFF</td>
<td class="tg-6sgx">1024.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for C66x_1 for Linux IPC</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C66x_2_RESOURCE_TABLE</td>
<td class="tg-kftd">0xA9100000</td>
<td class="tg-kftd">0xA91003FF</td>
<td class="tg-kftd">1024 B</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for C66x_2 for Linux resource table</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C66x_2_BOOT</td>
<td class="tg-6sgx">0xA9200000</td>
<td class="tg-6sgx">0xA92003FF</td>
<td class="tg-6sgx">1024 B</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for C66x_2 for boot section</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C66x_2</td>
<td class="tg-kftd">0xA9200400</td>
<td class="tg-kftd">0xA9FFFFFF</td>
<td class="tg-kftd">14.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for C66x_2 for code/data</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C7x_1_IPC</td>
<td class="tg-6sgx">0xAA000000</td>
<td class="tg-6sgx">0xAA0FFFFF</td>
<td class="tg-6sgx">1024.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for C7x_1 for Linux IPC</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C7x_1_RESOURCE_TABLE</td>
<td class="tg-kftd">0xAA100000</td>
<td class="tg-kftd">0xAA1003FF</td>
<td class="tg-kftd">1024 B</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for C7x_1 for Linux resource table</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C7x_1_BOOT</td>
<td class="tg-6sgx">0xAA200000</td>
<td class="tg-6sgx">0xAA2003FF</td>
<td class="tg-6sgx">1024 B</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for C7x_1 for boot section</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C7x_1_VECS</td>
<td class="tg-kftd">0xAA400000</td>
<td class="tg-kftd">0xAA403FFF</td>
<td class="tg-kftd">16.00 KB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for C7x_1 for vecs section</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C7x_1_SECURE_VECS</td>
<td class="tg-6sgx">0xAA600000</td>
<td class="tg-6sgx">0xAA603FFF</td>
<td class="tg-6sgx">16.00 KB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for C7x_1 for secure vecs section</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C7x_1</td>
<td class="tg-kftd">0xAA604000</td>
<td class="tg-kftd">0xAEFFFFFF</td>
<td class="tg-kftd">73.98 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for C7x_1 for code/data</td>
</tr>
<tr>
<td class="tg-6sgx">IPC_VRING_MEM</td>
<td class="tg-6sgx">0xB0000000</td>
<td class="tg-6sgx">0xB1FFFFFF</td>
<td class="tg-6sgx">32.00 MB</td>
<td class="tg-6sgx"></td>
<td class="tg-6sgx">Memory for IPC Vring's. MUST be non-cached or cache-coherent</td>
</tr>
<tr>
<td class="tg-kftd">APP_LOG_MEM</td>
<td class="tg-kftd">0xB2000000</td>
<td class="tg-kftd">0xB203FFFF</td>
<td class="tg-kftd">256.00 KB</td>
<td class="tg-kftd"></td>
<td class="tg-kftd">Memory for remote core logging</td>
</tr>
<tr>
<td class="tg-6sgx">TIOVX_OBJ_DESC_MEM</td>
<td class="tg-6sgx">0xB2040000</td>
<td class="tg-6sgx">0xB5FDFFFF</td>
<td class="tg-6sgx">63.62 MB</td>
<td class="tg-6sgx"></td>
<td class="tg-6sgx">Memory for TI OpenVX shared memory. MUST be non-cached or cache-coherent</td>
</tr>
<tr>
<td class="tg-kftd">PCIE_QUEUE_SHARED_MEM</td>
<td class="tg-kftd">0xB5FE0000</td>
<td class="tg-kftd">0xB5FEFFFF</td>
<td class="tg-kftd">64.00 KB</td>
<td class="tg-kftd"></td>
<td class="tg-kftd">Memory for IPC over PCIe using shared memory. MUST be non-cached or cache-coherent</td>
</tr>
<tr>
<td class="tg-6sgx">PCIE_QUEUE_MIRROR_REMOTE_SHARED_MEM</td>
<td class="tg-6sgx">0xB5FF0000</td>
<td class="tg-6sgx">0xB5FFFFFF</td>
<td class="tg-6sgx">64.00 KB</td>
<td class="tg-6sgx"></td>
<td class="tg-6sgx">Reserved Memory for RAT mapping of remote PCIe IPC shared memory. MUST be non-cached or cache-coherent</td>
</tr>
<tr>
<td class="tg-kftd">TIOVX_LOG_RT_MEM</td>
<td class="tg-kftd">0xB6000000</td>
<td class="tg-kftd">0xB7FFFFFF</td>
<td class="tg-kftd">32.00 MB</td>
<td class="tg-kftd"></td>
<td class="tg-kftd">Memory for TI OpenVX shared memory for Run-time logging. MUST be non-cached or cache-coherent</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_SHARED_MEM</td>
<td class="tg-6sgx">0xB8000000</td>
<td class="tg-6sgx">0xD7FFFFFF</td>
<td class="tg-6sgx">512.00 MB</td>
<td class="tg-6sgx"></td>
<td class="tg-6sgx">Memory for shared memory buffers in DDR</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU2_0_NON_CACHE</td>
<td class="tg-kftd">0xD8000000</td>
<td class="tg-kftd">0xD8FFFFFF</td>
<td class="tg-kftd">16.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU2_0 for non-cached heap</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU2_1_NON_CACHE</td>
<td class="tg-6sgx">0xD9000000</td>
<td class="tg-6sgx">0xDFFFFFFF</td>
<td class="tg-6sgx">112.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU2_1 for non-cached heap</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU1_0_LOCAL_HEAP</td>
<td class="tg-kftd">0xE0000000</td>
<td class="tg-kftd">0xE07FFFFF</td>
<td class="tg-kftd"> 8.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU1_0 for local heap</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU1_1_LOCAL_HEAP</td>
<td class="tg-6sgx">0xE0800000</td>
<td class="tg-6sgx">0xE0FFFFFF</td>
<td class="tg-6sgx"> 8.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU1_1 for local heap</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU2_0_LOCAL_HEAP</td>
<td class="tg-kftd">0xE1000000</td>
<td class="tg-kftd">0xE1FFFFFF</td>
<td class="tg-kftd">16.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU2_0 for local heap</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU2_1_LOCAL_HEAP</td>
<td class="tg-6sgx">0xE2000000</td>
<td class="tg-6sgx">0xE2FFFFFF</td>
<td class="tg-6sgx">16.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU2_1 for local heap</td>
</tr>
<tr>
<td class="tg-kftd">DDR_MCU3_0_LOCAL_HEAP</td>
<td class="tg-kftd">0xE3000000</td>
<td class="tg-kftd">0xE37FFFFF</td>
<td class="tg-kftd"> 8.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for MCU3_0 for local heap</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_MCU3_1_LOCAL_HEAP</td>
<td class="tg-6sgx">0xE3800000</td>
<td class="tg-6sgx">0xE3FFFFFF</td>
<td class="tg-6sgx"> 8.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for MCU3_1 for local heap</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C66X_1_LOCAL_HEAP</td>
<td class="tg-kftd">0xE4000000</td>
<td class="tg-kftd">0xE4FFFFFF</td>
<td class="tg-kftd">16.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for c66x_1 for local heap</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C66X_1_SCRATCH</td>
<td class="tg-6sgx">0xE5000000</td>
<td class="tg-6sgx">0xE7FFFFFF</td>
<td class="tg-6sgx">48.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for c66x_1 for Scratch Memory</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C66X_2_LOCAL_HEAP</td>
<td class="tg-kftd">0xE8000000</td>
<td class="tg-kftd">0xE8FFFFFF</td>
<td class="tg-kftd">16.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for c66x_2 for local heap</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C66X_2_SCRATCH</td>
<td class="tg-6sgx">0xE9000000</td>
<td class="tg-6sgx">0xEBFFFFFF</td>
<td class="tg-6sgx">48.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for c66x_2 for Scratch Memory</td>
</tr>
<tr>
<td class="tg-kftd">DDR_C7X_1_SCRATCH</td>
<td class="tg-kftd">0xEC000000</td>
<td class="tg-kftd">0xFBFFFFFF</td>
<td class="tg-kftd">256.00 MB</td>
<td class="tg-kftd">RWIX</td>
<td class="tg-kftd">DDR for c7x_1 for Scratch Memory</td>
</tr>
<tr>
<td class="tg-6sgx">DDR_C7X_1_LOCAL_HEAP</td>
<td class="tg-6sgx">0x100000000</td>
<td class="tg-6sgx">0x13FFFFFFF</td>
<td class="tg-6sgx">1024.00 MB</td>
<td class="tg-6sgx">RWIX</td>
<td class="tg-6sgx">DDR for c7x_1 for local heap</td>
</tr>
</table>
</body>
</html>